Alex Ionescu d89145a431 - Fix a bug in HalEnableSystemInterrupt which was causing us to read invalid port data instead of the PCI edge/level registers. ...

- Fix an offset bug which was causing us to read/write to DR7 in a completely random location (somewhere in side the _CONTEXT record).
- Fix a bug in DR save/restore which was making us save dr0,1,2 isntead of dr3,6,7.
- All bugs reported by Aleksey Bragin.

svn path=/trunk/; revision=25938

2007-03-01 20:27:33 +00:00

irc

modified Resources/hresult.xml

2006-09-09 10:53:28 +00:00

reactos

- Fix a bug in HalEnableSystemInterrupt which was causing us to read invalid port data instead of the PCI edge/level registers.

2007-03-01 20:27:33 +00:00

rosapps

Fix installname

2007-02-24 18:16:50 +00:00

S

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