Timo Kreuzer c508185cd9 [HAL]
- Fix I/O APIC register access
- set APIC logical id based on Cpu (currently flat model with up to 8 cpus supported)
- In HalpInitializeTsc, setup the RTC clock, since the timer is initialized later
- in the TSC calibration ISR, send EOI and read RTC register C to get the next interrupt

svn path=/trunk/; revision=53634
2011-09-08 08:15:39 +00:00
2011-09-08 08:15:39 +00:00
2011-04-05 21:20:42 +00:00
2011-09-07 23:08:14 +00:00
S
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