Sir Richard 40ba0f9329 [NTOS]: Use SYSTEM_PD_SIZE instead of assuming that this is PAGE_SIZE, since this is not the case on (future) ARM and (current) AMD64 ports.
[NTOS]: Remove some magic numbers in the pool code, using PTE_COUNT, MiAddressToPde, when needed. Also, the expansion code uses PDEs, not PTEs, so differentiate this, because on some systems (ARM), there are different structures for both.
[NTOS]: Use MI_WRITE_INVALID_PTE.
ARM3 paged pool now works, the expansion bug has been fixed (and the code is more portable). Expect to see it gradually enabled soon.

svn path=/trunk/; revision=48939
2010-09-30 03:26:13 +00:00
2010-07-25 20:57:38 +00:00
2010-09-29 21:42:11 +00:00
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