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[NTOS]: Enable usage of ARM3 paged pool, up until Mm Phase 2.

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[NTOS]: Re-arrange some of the init code, now that we have access to ARM3 paged pool early-on. Move more code to ARM3::INIT in its right place.
[NTOS]: Enable using the ARM3 PFN Database, getting rid of the old ReactOS PFN database. Should reduce physical memory usage now that we don't have two copies anymore.
[NTOS]: Fix the ARM3 PFN Datbase initialization code.
[NTOS]: Get rid of MiInitializePageList, use MiGetPfnEntryOffset instead of hard-coded pointer math in freelist.c.
This is the last big low-level Mm/ARM3 patch for a long, long time.

svn path=/trunk/; revision=47627
This commit is contained in:
Sir Richard
2010-06-06 15:59:42 +00:00
parent 55e7a4b5bf
commit d7372c2dc4
6 changed files with 54 additions and 183 deletions
Download Patch File Download Diff File Expand all files Collapse all files
reactos/ntoskrnl/include/internal/mm.h
+3 -3
View File
@@ -364,7 +364,7 @@ typedef struct _MMPFN
} u4;
} MMPFN, *PMMPFN;
extern PMMPFN MmPfnDatabase[2];
extern PMMPFN MmPfnDatabase;
typedef struct _MMPFNLIST
{
@@ -1095,7 +1095,7 @@ MiGetPfnEntry(IN PFN_TYPE Pfn)
if ((MiPfnBitMap.Buffer) && !(RtlTestBit(&MiPfnBitMap, Pfn))) return NULL;
/* Get the entry */
Page = &MmPfnDatabase[0][Pfn];
Page = &MmPfnDatabase[Pfn];
/* Return it */
return Page;
@@ -1108,7 +1108,7 @@ MiGetPfnEntryIndex(IN PMMPFN Pfn1)
//
// This will return the Page Frame Number (PFN) from the MMPFN
//
return Pfn1 - MmPfnDatabase[0];
return Pfn1 - MmPfnDatabase;
}
PFN_TYPE
reactos/ntoskrnl/mm/ARM3/expool.c
+1 -1
View File
@@ -19,7 +19,7 @@
#undef ExAllocatePoolWithQuota
#undef ExAllocatePoolWithQuotaTag
BOOLEAN AllowPagedPool = FALSE;
BOOLEAN AllowPagedPool = TRUE;
/* GLOBALS ********************************************************************/
reactos/ntoskrnl/mm/ARM3/i386/init.c
+10 -14
View File
@@ -306,7 +306,7 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
// then add the color tables and convert to pages
//
MxPfnAllocation = (MmHighestPhysicalPage + 1) * sizeof(MMPFN);
MxPfnAllocation <<= 1;
//MxPfnAllocation <<= 1;
MxPfnAllocation += (MmSecondaryColors * sizeof(MMCOLOR_TABLES) * 2);
MxPfnAllocation >>= PAGE_SHIFT;
@@ -380,19 +380,13 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
// with the old memory manager, so we'll create a "Shadow PFN Database"
// instead, and arbitrarly start it at 0xB0000000.
//
// We actually create two PFN databases, one for ReactOS starting here,
// and the next one used for ARM3, which starts right after. The MmPfnAllocation
// variable actually holds the size of both (the colored tables come after
// the ARM3 PFN database).
//
MmPfnDatabase[0] = (PVOID)0xB0000000;
MmPfnDatabase[1] = &MmPfnDatabase[0][MmHighestPhysicalPage];
ASSERT(((ULONG_PTR)MmPfnDatabase[0] & (PDE_MAPPED_VA - 1)) == 0);
MmPfnDatabase = (PVOID)0xB0000000;
ASSERT(((ULONG_PTR)MmPfnDatabase & (PDE_MAPPED_VA - 1)) == 0);
//
// Non paged pool comes after the PFN database
//
MmNonPagedPoolStart = (PVOID)((ULONG_PTR)MmPfnDatabase[0] +
MmNonPagedPoolStart = (PVOID)((ULONG_PTR)MmPfnDatabase +
(MxPfnAllocation << PAGE_SHIFT));
//
@@ -443,7 +437,7 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
//
// Now we need pages for the page tables which will map initial NP
//
StartPde = MiAddressToPde(MmPfnDatabase[0]);
StartPde = MiAddressToPde(MmPfnDatabase);
EndPde = MiAddressToPde((PVOID)((ULONG_PTR)MmNonPagedPoolStart +
MmSizeOfNonPagedPoolInBytes - 1));
while (StartPde <= EndPde)
@@ -510,12 +504,14 @@ MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
/* Initialize the color tables */
MiInitializeColorTables();
/* ReactOS Stuff */
extern KEVENT ZeroPageThreadEvent;
KeInitializeEvent(&ZeroPageThreadEvent, NotificationEvent, TRUE);
/* Build the PFN Database */
MiInitializePfnDatabase(LoaderBlock);
MmInitializeBalancer(MmAvailablePages, 0);
/* Call back into shitMM to setup the ReactOS PFN database */
MmInitializePageList();
//
// Reset the descriptor back so we can create the correct memory blocks
//
reactos/ntoskrnl/mm/ARM3/mminit.c
+29 -57
View File
@@ -439,7 +439,7 @@ MiInitializeColorTables(VOID)
MMPTE TempPte = ValidKernelPte;
/* The color table starts after the ARM3 PFN database */
MmFreePagesByColor[0] = (PMMCOLOR_TABLES)&MmPfnDatabase[1][MmHighestPhysicalPage + 1];
MmFreePagesByColor[0] = (PMMCOLOR_TABLES)&MmPfnDatabase[MmHighestPhysicalPage + 1];
/* Loop the PTEs. We have two color tables for each secondary color */
PointerPte = MiAddressToPte(&MmFreePagesByColor[0][0]);
@@ -585,8 +585,8 @@ MiMapPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
}
/* Get the PTEs for this range */
PointerPte = MiAddressToPte(&MmPfnDatabase[0][BasePage]);
LastPte = MiAddressToPte(((ULONG_PTR)&MmPfnDatabase[0][BasePage + PageCount]) - 1);
PointerPte = MiAddressToPte(&MmPfnDatabase[BasePage]);
LastPte = MiAddressToPte(((ULONG_PTR)&MmPfnDatabase[BasePage + PageCount]) - 1);
DPRINT("MD Type: %lx Base: %lx Count: %lx\n", MdBlock->MemoryType, BasePage, PageCount);
/* Loop them */
@@ -625,49 +625,7 @@ MiMapPfnDatabase(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
/* Next! */
PointerPte++;
}
/* Get the PTEs for this range */
PointerPte = MiAddressToPte(&MmPfnDatabase[1][BasePage]);
LastPte = MiAddressToPte(((ULONG_PTR)&MmPfnDatabase[1][BasePage + PageCount]) - 1);
DPRINT("MD Type: %lx Base: %lx Count: %lx\n", MdBlock->MemoryType, BasePage, PageCount);
/* Loop them */
while (PointerPte <= LastPte)
{
/* We'll only touch PTEs that aren't already valid */
if (PointerPte->u.Hard.Valid == 0)
{
/* Use the next free page */
TempPte.u.Hard.PageFrameNumber = FreePage;
ASSERT(FreePageCount != 0);
/* Consume free pages */
FreePage++;
FreePageCount--;
if (!FreePageCount)
{
/* Out of memory */
KeBugCheckEx(INSTALL_MORE_MEMORY,
MmNumberOfPhysicalPages,
FreePageCount,
MxOldFreeDescriptor.PageCount,
1);
}
/* Write out this PTE */
PagesLeft++;
ASSERT(PointerPte->u.Hard.Valid == 0);
ASSERT(TempPte.u.Hard.Valid == 1);
*PointerPte = TempPte;
/* Zero this page */
RtlZeroMemory(MiPteToAddress(PointerPte), PAGE_SIZE);
}
/* Next! */
PointerPte++;
}
/* Do the next address range */
NextEntry = MdBlock->ListEntry.Flink;
}
@@ -706,7 +664,7 @@ MiBuildPfnDatabaseFromPages(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
if (MiIsRegularMemory(LoaderBlock, PageFrameIndex))
{
/* Yes we do, set it up */
Pfn1 = MI_PFN_TO_PFNENTRY(PageFrameIndex);
Pfn1 = MiGetPfnEntry(PageFrameIndex);
Pfn1->u4.PteFrame = StartupPdIndex;
Pfn1->PteAddress = PointerPde;
Pfn1->u2.ShareCount++;
@@ -745,7 +703,7 @@ MiBuildPfnDatabaseFromPages(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
MmSizeOfNonPagedPoolInBytes)))
{
/* Get the PFN entry and make sure it too is valid */
Pfn2 = MI_PFN_TO_PFNENTRY(PtePageIndex);
Pfn2 = MiGetPfnEntry(PtePageIndex);
if ((MmIsAddressValid(Pfn2)) &&
(MmIsAddressValid(Pfn2 + 1)))
{
@@ -785,7 +743,7 @@ MiBuildPfnDatabaseZeroPage(VOID)
PMMPDE PointerPde;
/* Grab the lowest page and check if it has no real references */
Pfn1 = MI_PFN_TO_PFNENTRY(MmLowestPhysicalPage);
Pfn1 = MiGetPfnEntry(MmLowestPhysicalPage);
if (!(MmLowestPhysicalPage) && !(Pfn1->u3.e2.ReferenceCount))
{
/* Make it a bogus page to catch errors */
@@ -810,6 +768,7 @@ MiBuildPfnDatabaseFromLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
PMMPFN Pfn1;
PMMPTE PointerPte;
PMMPDE PointerPde;
KIRQL OldIrql;
/* Now loop through the descriptors */
NextEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
@@ -860,14 +819,18 @@ MiBuildPfnDatabaseFromLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
/* Get the last page of this descriptor. Note we loop backwards */
PageFrameIndex += PageCount - 1;
Pfn1 = MI_PFN_TO_PFNENTRY(PageFrameIndex);
Pfn1 = MiGetPfnEntry(PageFrameIndex);
/* Lock the PFN Database */
OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
while (PageCount--)
{
/* If the page really has no references, mark it as free */
if (!Pfn1->u3.e2.ReferenceCount)
{
/* Add it to the free list */
Pfn1->u3.e1.CacheAttribute = MiNonCached;
//MiInsertPageInFreeList(PageFrameIndex);
MiInsertPageInFreeList(PageFrameIndex);
}
/* Go to the next page */
@@ -875,6 +838,9 @@ MiBuildPfnDatabaseFromLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
PageFrameIndex--;
}
/* Release PFN database */
KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
/* Done with this block */
break;
@@ -890,7 +856,7 @@ MiBuildPfnDatabaseFromLoaderBlock(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
/* Map these pages with the KSEG0 mapping that adds 0x80000000 */
PointerPte = MiAddressToPte(KSEG0_BASE + (PageFrameIndex << PAGE_SHIFT));
Pfn1 = MI_PFN_TO_PFNENTRY(PageFrameIndex);
Pfn1 = MiGetPfnEntry(PageFrameIndex);
while (PageCount--)
{
/* Check if the page is really unused */
@@ -940,15 +906,15 @@ MiBuildPfnDatabaseSelf(VOID)
PMMPFN Pfn1;
/* Loop the PFN database page */
PointerPte = MiAddressToPte(MI_PFN_TO_PFNENTRY(MmLowestPhysicalPage));
LastPte = MiAddressToPte(MI_PFN_TO_PFNENTRY(MmHighestPhysicalPage));
PointerPte = MiAddressToPte(MiGetPfnEntry(MmLowestPhysicalPage));
LastPte = MiAddressToPte(MiGetPfnEntry(MmHighestPhysicalPage));
while (PointerPte <= LastPte)
{
/* Make sure the page is valid */
if (PointerPte->u.Hard.Valid == 1)
{
/* Get the PFN entry and just mark it referenced */
Pfn1 = MI_PFN_TO_PFNENTRY(PointerPte->u.Hard.PageFrameNumber);
Pfn1 = MiGetPfnEntry(PointerPte->u.Hard.PageFrameNumber);
Pfn1->u2.ShareCount = 1;
Pfn1->u3.e2.ReferenceCount = 1;
}
@@ -1258,7 +1224,7 @@ MmDumpArmPfnDatabase(VOID)
//
for (i = 0; i <= MmHighestPhysicalPage; i++)
{
Pfn1 = MI_PFN_TO_PFNENTRY(i);
Pfn1 = MiGetPfnEntry(i);
if (!Pfn1) continue;
//
@@ -1848,7 +1814,7 @@ MmArmInitSystem(IN ULONG Phase,
// Sync us up with ReactOS Mm
//
MiSyncARM3WithROS(MmNonPagedSystemStart, (PVOID)((ULONG_PTR)MmNonPagedPoolEnd - 1));
MiSyncARM3WithROS(MmPfnDatabase[0], (PVOID)((ULONG_PTR)MmNonPagedPoolStart + MmSizeOfNonPagedPoolInBytes - 1));
MiSyncARM3WithROS(MmPfnDatabase, (PVOID)((ULONG_PTR)MmNonPagedPoolStart + MmSizeOfNonPagedPoolInBytes - 1));
MiSyncARM3WithROS((PVOID)HYPER_SPACE, (PVOID)(HYPER_SPACE + PAGE_SIZE - 1));
//
@@ -2029,6 +1995,12 @@ MmArmInitSystem(IN ULONG Phase,
/* Size up paged pool and build the shadow system page directory */
MiBuildPagedPool();
/* Debugger physical memory support is now ready to be used */
MiDbgReadyForPhysical = TRUE;
/* Initialize the loaded module list */
MiInitializeLoadedModuleList(LoaderBlock);
}
//
reactos/ntoskrnl/mm/freelist.c
+3 -87
View File
@@ -33,8 +33,7 @@
#define PHYSICAL_PAGE MMPFN
#define PPHYSICAL_PAGE PMMPFN
/* The first array contains ReactOS PFNs, the second contains ARM3 PFNs */
PPHYSICAL_PAGE MmPfnDatabase[2];
PPHYSICAL_PAGE MmPfnDatabase;
PFN_NUMBER MmAvailablePages;
PFN_NUMBER MmResidentAvailablePages;
@@ -448,89 +447,6 @@ MmDumpPfnDatabase(VOID)
KeLowerIrql(OldIrql);
}
VOID
NTAPI
MmInitializePageList(VOID)
{
ULONG i;
PHYSICAL_PAGE UsedPage;
PMEMORY_ALLOCATION_DESCRIPTOR Md;
PLIST_ENTRY NextEntry;
ULONG NrSystemPages = 0;
KIRQL OldIrql;
/* This is what a used page looks like */
RtlZeroMemory(&UsedPage, sizeof(UsedPage));
UsedPage.u3.e1.PageLocation = ActiveAndValid;
UsedPage.u3.e2.ReferenceCount = 1;
/* Lock PFN database */
OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
/* Loop the memory descriptors */
for (NextEntry = KeLoaderBlock->MemoryDescriptorListHead.Flink;
NextEntry != &KeLoaderBlock->MemoryDescriptorListHead;
NextEntry = NextEntry->Flink)
{
/* Get the descriptor */
Md = CONTAINING_RECORD(NextEntry,
MEMORY_ALLOCATION_DESCRIPTOR,
ListEntry);
/* Skip bad memory */
if ((Md->MemoryType == LoaderFirmwarePermanent) ||
(Md->MemoryType == LoaderBBTMemory) ||
(Md->MemoryType == LoaderSpecialMemory) ||
(Md->MemoryType == LoaderBad))
{
//
// We do not build PFN entries for this
//
continue;
}
else if ((Md->MemoryType == LoaderFree) ||
(Md->MemoryType == LoaderLoadedProgram) ||
(Md->MemoryType == LoaderFirmwareTemporary) ||
(Md->MemoryType == LoaderOsloaderStack))
{
/* Loop every page part of the block */
for (i = 0; i < Md->PageCount; i++)
{
/* Mark it as a free page */
MmPfnDatabase[0][Md->BasePage + i].u3.e1.PageLocation = FreePageList;
MiInsertInListTail(&MmFreePageListHead,
&MmPfnDatabase[0][Md->BasePage + i]);
MmAvailablePages++;
}
}
else
{
/* Loop every page part of the block */
for (i = 0; i < Md->PageCount; i++)
{
/* Everything else is used memory */
MmPfnDatabase[0][Md->BasePage + i] = UsedPage;
NrSystemPages++;
}
}
}
/* Finally handle the pages describing the PFN database themselves */
for (i = MxOldFreeDescriptor.BasePage; i < MxFreeDescriptor->BasePage; i++)
{
/* Mark it as used kernel memory */
MmPfnDatabase[0][i] = UsedPage;
NrSystemPages++;
}
/* Release the PFN database lock */
KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
KeInitializeEvent(&ZeroPageThreadEvent, NotificationEvent, TRUE);
DPRINT("Pages: %x %x\n", MmAvailablePages, NrSystemPages);
MmInitializeBalancer(MmAvailablePages, NrSystemPages);
}
VOID
NTAPI
MmSetRmapListHeadPage(PFN_TYPE Pfn, struct _MM_RMAP_ENTRY* ListHead)
@@ -695,7 +611,7 @@ MmAllocPage(ULONG Type)
MmAvailablePages--;
PfnOffset = PageDescriptor - MmPfnDatabase[0];
PfnOffset = MiGetPfnEntryIndex(PageDescriptor);
if ((NeedClear) && (Type != MC_SYSTEM))
{
MiZeroPage(PfnOffset);
@@ -761,7 +677,7 @@ MmZeroPageThreadMain(PVOID Ignored)
PageDescriptor = MiRemoveHeadList(&MmFreePageListHead);
/* We set the page to used, because MmCreateVirtualMapping failed with unused pages */
KeReleaseQueuedSpinLock(LockQueuePfnLock, oldIrql);
Pfn = PageDescriptor - MmPfnDatabase[0];
Pfn = MiGetPfnEntryIndex(PageDescriptor);
Status = MiZeroPage(Pfn);
oldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
reactos/ntoskrnl/mm/mminit.c
+8 -21
View File
@@ -109,7 +109,7 @@ MiInitSystemMemoryAreas()
//
// Protect the PFN database
//
BaseAddress = MmPfnDatabase[0];
BaseAddress = MmPfnDatabase;
Status = MmCreateMemoryArea(MmGetKernelAddressSpace(),
MEMORY_AREA_OWNED_BY_ARM3 | MEMORY_AREA_STATIC,
&BaseAddress,
@@ -292,8 +292,8 @@ MiDbgDumpAddressSpace(VOID)
(ULONG_PTR)MmPagedPoolBase + MmPagedPoolSize,
"Paged Pool");
DPRINT1(" 0x%p - 0x%p\t%s\n",
MmPfnDatabase[0],
(ULONG_PTR)MmPfnDatabase[0] + (MxPfnAllocation << PAGE_SHIFT),
MmPfnDatabase,
(ULONG_PTR)MmPfnDatabase + (MxPfnAllocation << PAGE_SHIFT),
"PFN Database");
DPRINT1(" 0x%p - 0x%p\t%s\n",
MmNonPagedPoolStart,
@@ -371,18 +371,8 @@ MmInitSystem(IN ULONG Phase,
/* Dump memory descriptors */
if (MiDbgEnableMdDump) MiDbgDumpMemoryDescriptors();
//
// Initialize ARM³ in phase 0
//
/* Initialize ARM³ in phase 0 */
MmArmInitSystem(0, KeLoaderBlock);
#if defined(_WINKD_)
//
// Everything required for the debugger to read and write
// physical memory is now set up
//
MiDbgReadyForPhysical = TRUE;
#endif
/* Put the paged pool after the loaded modules */
MmPagedPoolBase = (PVOID)PAGE_ROUND_UP((ULONG_PTR)MmSystemRangeStart +
@@ -394,15 +384,10 @@ MmInitSystem(IN ULONG Phase,
/* Dump the address space */
MiDbgDumpAddressSpace();
/* Initialize paged pool */
MmInitializePagedPool();
/* Initialize the loaded module list */
MiInitializeLoadedModuleList(LoaderBlock);
}
else if (Phase == 1)
{
MmInitializePagedPool();
MiInitializeUserPfnBitmap();
MmInitializeMemoryConsumer(MC_USER, MmTrimUserMemory);
MmInitializeRmapList();
@@ -453,7 +438,9 @@ MmInitSystem(IN ULONG Phase,
}
else if (Phase == 2)
{
/* Enough fun for now */
extern BOOLEAN AllowPagedPool;
AllowPagedPool = FALSE;
}
return TRUE;