ApfelTeeSaft/reactos
1
0
Fork 0
mirror of https://github.com/ApfelTeeSaft/reactos.git synced 2026-08-31 19:26:42 +00:00
Code Issues Packages Projects Releases Wiki Activity

[UNIATA]

Browse Source 
* Sync to 0.44d.
[ATACTL]
* Sync to 0.44d.

svn path=/trunk/; revision=58608
This commit is contained in:
Amine Khaldi
2013-03-24 19:41:59 +00:00
parent 4e62a422f8
commit bf8b1b2aaa
8 changed files with 102 additions and 60 deletions
Download Patch File Download Diff File Expand all files Collapse all files
reactos/base/applications/atactl/atactl.cpp
+11 -6
View File
@@ -337,7 +337,7 @@ ata_send_scsi(
{
ULONG status;
PSCSI_PASS_THROUGH_WITH_BUFFERS sptwb;
ULONG data_len = BufferLength;
//ULONG data_len = BufferLength;
ULONG len;
len = BufferLength + offsetof(SCSI_PASS_THROUGH_WITH_BUFFERS, ucDataBuf);
@@ -1065,7 +1065,7 @@ ata_list(
{
char dev_name[64];
HANDLE h;
BOOLEAN uniata_driven;
//BOOLEAN uniata_driven;
if(bus_id == -1) {
for(bus_id=0; TRUE; bus_id++) {
@@ -1074,7 +1074,7 @@ ata_list(
}
return TRUE;
}
uniata_driven = ata_adapter_info(bus_id, g_adapter_info);
/*uniata_driven =*/ ata_adapter_info(bus_id, g_adapter_info);
sprintf(dev_name, "\\\\.\\Scsi%d:", bus_id);
h = ata_open_dev(dev_name);
if(!h)
@@ -1230,8 +1230,13 @@ ata_hide(
&to, sizeof(to),
NULL, 0,
&returned);
if(!status) {
printf("Delete failed\n");
} else {
printf("Device is detached\n");
}
ata_close_dev(h);
return TRUE;
return status ? TRUE : FALSE;
} // end ata_hide()
BOOLEAN
@@ -1289,7 +1294,7 @@ ata_scan(
FALSE);
}
ata_close_dev(h);
return TRUE;
return status ? TRUE : FALSE;
} // end ata_scan()
CHAR*
@@ -1656,7 +1661,7 @@ ata_power_mode(
NULL, 0, FALSE,
&senseData, &returned);
ata_close_dev(h);
return TRUE;
return status ? TRUE : FALSE;
} // end ata_power_mode()
int
reactos/drivers/storage/ide/uniata/atapi.h
+2
View File
@@ -334,6 +334,8 @@ typedef struct _MODE_PARAMETER_HEADER_10 {
#define ATA_SA300 0x48 /*0x81*/
#define ATA_SA600 0x49 /*0x82*/
#define ATA_MODE_NOT_SPEC ((ULONG)(-1)) /*0x82*/
//
// IDE command definitions
//
reactos/drivers/storage/ide/uniata/bm_devs.h
+2 -2
View File
@@ -66,7 +66,7 @@ typedef struct _BUSMASTER_CONTROLLER_INFORMATION {
ULONG nDeviceId;
ULONG nRevId;
ULONG MaxTransferMode;
PCHAR FullDevName;
PVEN_STR FullDevName;
ULONG RaidFlags;
CHAR VendorIdStr[4];
CHAR DeviceIdStr[4];
@@ -665,7 +665,7 @@ typedef struct _BUSMASTER_CONTROLLER_INFORMATION {
#ifdef USER_MODE
#define PCI_DEV_HW_SPEC_BM(idhi, idlo, rev, mode, name, flags) \
{ (PVEN_STR) #idlo, 4, 0x##idlo, (PVEN_STR) #idhi, 4, 0x##idhi, rev, mode, name, flags}
{ (PVEN_STR) #idlo, 4, 0x##idlo, (PVEN_STR) #idhi, 4, 0x##idhi, rev, mode, (PVEN_STR)name, flags}
#else
#define PCI_DEV_HW_SPEC_BM(idhi, idlo, rev, mode, name, flags) \
{ (PVEN_STR) #idlo, 4, 0x##idlo, (PVEN_STR) #idhi, 4, 0x##idhi, rev, mode, NULL, flags}
reactos/drivers/storage/ide/uniata/id_ata.cpp
+38 -22
View File
@@ -1354,7 +1354,7 @@ IssueIdentify(
ULONG waitCount = 50000;
ULONG j;
UCHAR statusByte;
UCHAR statusByte2;
//UCHAR statusByte2;
UCHAR signatureLow,
signatureHigh;
BOOLEAN atapiDev = FALSE;
@@ -1393,7 +1393,7 @@ IssueIdentify(
AtapiStallExecution(10);
statusByte = WaitOnBusyLong(chan);
// Check that the status register makes sense.
GetBaseStatus(chan, statusByte2);
GetBaseStatus(chan, statusByte);
}
if (Command == IDE_COMMAND_IDENTIFY) {
@@ -1435,11 +1435,11 @@ IssueIdentify(
}
} while ((statusByte & IDE_STATUS_BUSY) && waitCount--);
GetBaseStatus(chan, statusByte2);
GetBaseStatus(chan, statusByte);
SelectDrive(chan, DeviceNumber);
} else {
GetBaseStatus(chan, statusByte2);
GetBaseStatus(chan, statusByte);
}
// Another check for signature, to deal with one model Atapi that doesn't assert signature after
// a soft reset.
@@ -3121,7 +3121,7 @@ AtapiHwInitialize__(
} else if (!(LunExt->DeviceFlags & DFLAGS_CHANGER_INITED)){
ULONG j;
BOOLEAN isSanyo = FALSE;
//BOOLEAN isSanyo = FALSE;
CCHAR vendorId[26];
KdPrint2((PRINT_PREFIX "AtapiHwInitialize: ATAPI/Changer branch\n"));
@@ -3142,7 +3142,7 @@ AtapiHwInitialize__(
// acting like 1) a multi-lun device and 2) building the 'special' TUR's.
LunExt->DeviceFlags |= (DFLAGS_CHANGER_INITED | DFLAGS_SANYO_ATAPI_CHANGER);
LunExt->DiscsPresent = 3;
isSanyo = TRUE;
//isSanyo = TRUE;
}
}
}
@@ -4533,7 +4533,9 @@ AtapiInterrupt__(
BOOLEAN atapiDev = FALSE;
#ifdef DBG
UCHAR Channel;
#endif //DBG
UCHAR lChannel;
UCHAR DeviceNumber;
BOOLEAN DmaTransfer = FALSE;
@@ -4564,9 +4566,12 @@ AtapiInterrupt__(
PHW_LU_EXTENSION LunExt;
lChannel = c;
#ifdef DBG
Channel = (UCHAR)(deviceExtension->Channel + lChannel);
KdPrint2((PRINT_PREFIX " cntrlr %#x:%d, irql %#x, c %d\n", deviceExtension->DevIndex, Channel, KeGetCurrentIrql(), c));
#endif //DBG
if((chan->ChannelCtrlFlags & CTRFLAGS_DMA_ACTIVE) ||
(AtaReq && (AtaReq->Flags & REQ_FLAG_DMA_OPERATION)) ||
@@ -5525,11 +5530,20 @@ IntrPrepareResetController:
} else if (interruptReason == (ATAPI_IR_IO_toHost | ATAPI_IR_COD_Cmd) && !(statusByte & IDE_STATUS_DRQ)) {
KdPrint2((PRINT_PREFIX "AtapiInterrupt: interruptReason = CompleteRequest\n"));
// Command complete.
// Command complete. We exactly know this because os IReason.
if(DmaTransfer) {
KdPrint2((PRINT_PREFIX "AtapiInterrupt: CompleteRequest, was DmaTransfer\n"));
AtaReq->WordsTransfered = AtaReq->WordsLeft;
AtaReq->WordsTransfered += AtaReq->WordsLeft;
AtaReq->WordsLeft = 0;
} else {
KdPrint2((PRINT_PREFIX "AtapiInterrupt: CompleteRequest, was PIO\n"));
wordCount = AtaReq->WordsLeft;
// Advance data buffer pointer and bytes left.
AtaReq->DataBuffer += wordCount;
AtaReq->WordsLeft -= wordCount;
AtaReq->WordsTransfered += wordCount;
}
//if (AtaReq->WordsLeft) {
// status = SRB_STATUS_DATA_OVERRUN;
@@ -9905,7 +9919,7 @@ DriverEntry(
ULONG statusToReturn, newStatus;
PUNICODE_STRING RegistryPath = (PUNICODE_STRING)Argument2;
BOOLEAN ReEnter = FALSE;
WCHAR a;
// WCHAR a;
#ifndef USE_REACTOS_DDK
NTSTATUS status;
#endif
@@ -9918,7 +9932,7 @@ DriverEntry(
Connect_DbgPrint();
KdPrint2((PRINT_PREFIX "%s", (PCCHAR)ver_string));
a = (WCHAR)strlen(ver_string);
//a = (WCHAR)strlen(ver_string);
g_opt_Verbose = (BOOLEAN)AtapiRegCheckDevValue(NULL, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"PrintLogo", 0);
if(g_opt_Verbose) {
@@ -10752,7 +10766,7 @@ AtapiAdapterControl(
}
if(deviceExtension->AdapterInterfaceType == PCIBus) {
// we must never get here for non-PCI
status = UniataDisconnectIntr2(HwDeviceExtension);
/*status =*/ UniataDisconnectIntr2(HwDeviceExtension);
BMList[deviceExtension->DevIndex].Isr2Enable = FALSE;
}
break;
@@ -10765,15 +10779,17 @@ AtapiAdapterControl(
AtapiChipInit(HwDeviceExtension, DEVNUM_NOT_SPECIFIED, CHAN_NOT_SPECIFIED);
status = UniataConnectIntr2(HwDeviceExtension);
for (c = 0; c < numberChannels; c++) {
AtapiChipInit(HwDeviceExtension, DEVNUM_NOT_SPECIFIED, c);
FindDevices(HwDeviceExtension, 0, c);
AtapiEnableInterrupts(deviceExtension, c);
AtapiHwInitialize__(deviceExtension, c);
}
if(deviceExtension->Isr2DevObj) {
// we must never get here for non-PCI
BMList[deviceExtension->DevIndex].Isr2Enable = TRUE;
if(NT_SUCCESS(status)) {
for (c = 0; c < numberChannels; c++) {
AtapiChipInit(HwDeviceExtension, DEVNUM_NOT_SPECIFIED, c);
FindDevices(HwDeviceExtension, 0, c);
AtapiEnableInterrupts(deviceExtension, c);
AtapiHwInitialize__(deviceExtension, c);
}
if(deviceExtension->Isr2DevObj) {
// we must never get here for non-PCI
BMList[deviceExtension->DevIndex].Isr2Enable = TRUE;
}
}
break;
@@ -10808,13 +10824,13 @@ _PrintNtConsole(
...
)
{
int len;
//int len;
UCHAR dbg_print_tmp_buff[DEBUG_MSG_BUFFER_SIZE];
// UNICODE_STRING msgBuff;
va_list ap;
va_start(ap, DebugMessage);
len = _vsnprintf((PCHAR)&dbg_print_tmp_buff[0], DEBUG_MSG_BUFFER_SIZE-1, DebugMessage, ap);
/*len =*/ _vsnprintf((PCHAR)&dbg_print_tmp_buff[0], DEBUG_MSG_BUFFER_SIZE-1, DebugMessage, ap);
dbg_print_tmp_buff[DEBUG_MSG_BUFFER_SIZE-1] = 0;
reactos/drivers/storage/ide/uniata/id_init.cpp
+13 -13
View File
@@ -359,10 +359,10 @@ unknown_dev:
};
static BUSMASTER_CONTROLLER_INFORMATION const ViaSouthAdapters[] = {
PCI_DEV_HW_SPEC_BM( 3112, 1106, 0x00, -1, "VIA 8361", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 0305, 1106, 0x00, -1, "VIA 8363", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 0391, 1106, 0x00, -1, "VIA 8371", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 3102, 1106, 0x00, -1, "VIA 8662", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 3112, 1106, 0x00, ATA_MODE_NOT_SPEC, "VIA 8361", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 0305, 1106, 0x00, ATA_MODE_NOT_SPEC, "VIA 8363", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 0391, 1106, 0x00, ATA_MODE_NOT_SPEC, "VIA 8371", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( 3102, 1106, 0x00, ATA_MODE_NOT_SPEC, "VIA 8662", VIASOUTH ),
PCI_DEV_HW_SPEC_BM( ffff, ffff, 0xff, BMLIST_TERMINATOR, NULL , BMLIST_TERMINATOR )
};
@@ -785,9 +785,9 @@ for_ugly_chips:
ChangePciConfig1(0x57, (a | 0x80));
} else {
static BUSMASTER_CONTROLLER_INFORMATION const SiSSouthAdapters[] = {
PCI_DEV_HW_SPEC_BM( 0008, 1039, 0x10, -1, "SiS 961", 0 ),
// PCI_DEV_HW_SPEC_BM( 0008, 1039, 0x00, -1, "SiS 961", 0 ),
PCI_DEV_HW_SPEC_BM( ffff, ffff, 0xff, -1, NULL , -1 )
PCI_DEV_HW_SPEC_BM( 0008, 1039, 0x10, ATA_MODE_NOT_SPEC, "SiS 961", 0 ),
// PCI_DEV_HW_SPEC_BM( 0008, 1039, 0x00, ATA_MODE_NOT_SPEC, "SiS 961", 0 ),
PCI_DEV_HW_SPEC_BM( ffff, ffff, 0xff, ATA_MODE_NOT_SPEC, NULL , -1 )
};
// Save settings
GetPciConfig1(0x4a, tmp8);
@@ -798,8 +798,8 @@ for_ugly_chips:
-1, HwDeviceExtension, SystemIoBusNumber, PCISLOTNUM_NOT_SPECIFIED, NULL);
if(i != BMLIST_TERMINATOR) {
deviceExtension->HwFlags = (deviceExtension->HwFlags & ~CHIPTYPE_MASK) | SIS133OLD;
//deviceExtension->MaxTransferMode = ATA_UDMA6;
deviceExtension->MaxTransferMode = SiSSouthAdapters[i].MaxTransferMode;
deviceExtension->MaxTransferMode = ATA_UDMA6;
//deviceExtension->MaxTransferMode = SiSSouthAdapters[i].MaxTransferMode;
if(SiSSouthAdapters[i].RaidFlags & UNIATA_SATA) {
deviceExtension->HwFlags |= UNIATA_SATA;
if(SiSSouthAdapters[i].nDeviceId == 0x1182) {
@@ -1651,7 +1651,7 @@ AtapiChipInit(
PHW_CHANNEL chan;
UCHAR tmp8;
USHORT tmp16;
ULONG tmp32;
//ULONG tmp32;
ULONG c; // logical channel (for Compatible Mode controllers)
BOOLEAN CheckCable = FALSE;
BOOLEAN GlobalInit = FALSE;
@@ -2142,15 +2142,15 @@ AtapiChipInit(
chan = &deviceExtension->chan[c];
/* dont block interrupts */
//ChangePciConfig4(0x48, (a & ~0x03c00000));
tmp32 = AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48);
/*tmp32 =*/ AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48);
AtapiWritePortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48, (1 << 22) << c);
// flush
tmp32 = AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48);
/*tmp32 =*/ AtapiReadPortEx4(NULL, (ULONGIO_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48);
/* Initialize FIFO PCI bus arbitration */
GetPciConfig1(offsetof(PCI_COMMON_CONFIG, CacheLineSize), tmp8);
if(tmp8) {
KdPrint2((PRINT_PREFIX "SII: CacheLine=%d\n", tmp32));
KdPrint2((PRINT_PREFIX "SII: CacheLine=%d\n", tmp8));
tmp8 = (tmp8/8)+1;
AtapiWritePort2(chan, IDX_BM_DeviceSpecific1, ((USHORT)tmp8) << 8 | tmp8);
} else {
reactos/drivers/storage/ide/uniata/id_probe.cpp
+17 -12
View File
@@ -127,6 +127,10 @@ UniataEnableIoPCI(
// reread config space
busDataRead = HalGetBusData(PCIConfiguration, busNumber, slotNumber,
pciData, PCI_COMMON_HDR_LENGTH);
if(busDataRead < PCI_COMMON_HDR_LENGTH) {
KdPrint2((PRINT_PREFIX "HalGetBusData() failed %#x\n", busDataRead));
break;
}
KdPrint2((PRINT_PREFIX "New pciData.Command = %#x\n", pciData->Command));
}
KdPrint2((PRINT_PREFIX "InterruptLine = %#x\n", pciData->u.type0.InterruptLine));
@@ -287,7 +291,7 @@ UniataEnumBusMasterController__(
)
{
// PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PVOID HwDeviceExtension;
// PVOID HwDeviceExtension;
PHW_DEVICE_EXTENSION deviceExtension = NULL;
PCI_SLOT_NUMBER slotData;
PCI_COMMON_CONFIG pciData;
@@ -328,7 +332,7 @@ UniataEnumBusMasterController__(
deviceStrPtr = deviceString;
slotData.u.AsULONG = 0;
HwDeviceExtension =
/*HwDeviceExtension =*/
deviceExtension = (PHW_DEVICE_EXTENSION)ExAllocatePool(NonPagedPool, sizeof(HW_DEVICE_EXTENSION));
if(!deviceExtension) {
return(SP_RETURN_NOT_FOUND);
@@ -920,12 +924,13 @@ UniataFindBusMasterController(
ULONG slotNumber;
ULONG busDataRead;
ULONG SystemIoBusNumber;
/*
UCHAR vendorString[5];
UCHAR deviceString[5];
PUCHAR vendorStrPtr;
PUCHAR deviceStrPtr;
*/
UCHAR BaseClass;
UCHAR SubClass;
ULONG VendorID;
@@ -1025,10 +1030,10 @@ UniataFindBusMasterController(
return SP_RETURN_ERROR;
}
RtlZeroMemory(deviceExtension, sizeof(HW_DEVICE_EXTENSION));
/*
vendorStrPtr = vendorString;
deviceStrPtr = deviceString;
*/
slotNumber = BMList[i].slotNumber;
SystemIoBusNumber = BMList[i].busNumber;
@@ -2108,7 +2113,7 @@ AtapiFindController(
ULONG irq=0;
ULONG portBase;
ULONG retryCount;
BOOLEAN atapiOnly;
// BOOLEAN atapiOnly;
UCHAR statusByte;
BOOLEAN preConfig = FALSE;
//
@@ -2457,12 +2462,12 @@ not_found:
if (AtapiParseArgumentString(ArgumentString, "dump") == 1) {
KdPrint2((PRINT_PREFIX
"AtapiFindController: Crash dump\n"));
atapiOnly = FALSE;
//atapiOnly = FALSE;
deviceExtension->DriverMustPoll = TRUE;
} else {
KdPrint2((PRINT_PREFIX
"AtapiFindController: Atapi Only\n"));
atapiOnly = TRUE;
//atapiOnly = TRUE;
deviceExtension->DriverMustPoll = FALSE;
}
#endif //UNIATA_CORE
@@ -2470,17 +2475,17 @@ not_found:
KdPrint2((PRINT_PREFIX
"AtapiFindController: Atapi Only (2)\n"));
atapiOnly = TRUE;
//atapiOnly = TRUE;
deviceExtension->DriverMustPoll = FALSE;
}
} else {
atapiOnly = FALSE;
//atapiOnly = FALSE;
}
} else {
atapiOnly = FALSE;
//atapiOnly = FALSE;
deviceExtension->DriverMustPoll = FALSE;
}// preConfig check
reactos/drivers/storage/ide/uniata/id_sata.cpp
+17 -3
View File
@@ -645,7 +645,9 @@ UniataAhciInit(
PHW_CHANNEL chan;
ULONG offs;
ULONG BaseMemAddress;
#ifdef DBG
ULONG PI;
#endif //DBG
ULONG CAP;
ULONG GHC;
BOOLEAN MemIo = FALSE;
@@ -722,9 +724,11 @@ UniataAhciInit(
if(CAP & AHCI_CAP_SAM) {
KdPrint2((PRINT_PREFIX " AHCI legasy SATA\n"));
}
#ifdef DBG
/* get the number of HW channels */
PI = UniataAhciReadHostPort4(deviceExtension, IDX_AHCI_PI);
KdPrint2((PRINT_PREFIX " AHCI PI %#x\n", PI));
#endif //DBG
/* clear interrupts */
UniataAhciWriteHostPort4(deviceExtension, IDX_AHCI_IS,
@@ -837,9 +841,11 @@ UniataAhciDetect(
ULONG CAP;
ULONG CAP2;
ULONG GHC, GHC0;
#ifdef DBG
ULONG BOHC;
ULONG NumberChannels;
ULONG v_Mn, v_Mj;
#endif //DBG
ULONG NumberChannels;
ULONG BaseMemAddress;
BOOLEAN MemIo = FALSE;
BOOLEAN found = FALSE;
@@ -905,10 +911,12 @@ UniataAhciDetect(
KdPrint2((PRINT_PREFIX " 64bit"));
//deviceExtension->Host64 = TRUE; // this is just DETECT, do not update anything
}
#ifdef DBG
if(CAP2 & AHCI_CAP2_BOH) {
BOHC = UniataAhciReadHostPort4(deviceExtension, IDX_AHCI_BOHC);
KdPrint2((PRINT_PREFIX " BOHC %#x", BOHC));
}
#endif //DBG
if(CAP & AHCI_CAP_NCQ) {
KdPrint2((PRINT_PREFIX " NCQ"));
}
@@ -950,6 +958,7 @@ UniataAhciDetect(
goto exit_detect;
}
#ifdef DBG
v_Mj = ((version >> 20) & 0xf0) + ((version >> 16) & 0x0f);
v_Mn = ((version >> 4) & 0xf0) + (version & 0x0f);
@@ -957,6 +966,7 @@ UniataAhciDetect(
v_Mj, v_Mn,
NumberChannels, PI));
KdPrint((" AHCI SATA Gen %d\n", (((CAP & AHCI_CAP_ISS_MASK) >> 20)) ));
#endif //DBG
if(CAP & AHCI_CAP_SPM) {
KdPrint2((PRINT_PREFIX " PM supported\n"));
@@ -2166,11 +2176,11 @@ UniataAhciEndTransaction(
ULONG tag=0;
//ULONG i;
PIDE_AHCI_CMD_LIST AHCI_CL = &(chan->AhciCtlBlock->cmd_list[tag]);
PHW_LU_EXTENSION LunExt;
//PHW_LU_EXTENSION LunExt;
KdPrint2(("UniataAhciEndTransaction: lChan %d\n", chan->lChannel));
LunExt = chan->lun[DeviceNumber];
//LunExt = chan->lun[DeviceNumber];
TFD = UniataAhciReadChannelPort4(chan, IDX_AHCI_P_TFD);
KdPrint2((" TFD %#x\n", TFD));
@@ -2474,7 +2484,9 @@ IN OUT PATA_REQ AtaReq
PUCHAR prd_base0;
ULONGLONG prd_base64_0;
};
#ifdef DBG
ULONG d;
#endif // DBG
prd_base64_0 = prd_base64 = 0;
prd_base = (PUCHAR)(&AtaReq->ahci_cmd0);
@@ -2482,8 +2494,10 @@ IN OUT PATA_REQ AtaReq
prd_base64 = (prd_base64 + max(FIELD_OFFSET(ATA_REQ, ahci_cmd0), AHCI_CMD_ALIGNEMENT_MASK+1)) & ~AHCI_CMD_ALIGNEMENT_MASK;
#ifdef DBG
d = (ULONG)(prd_base64 - prd_base64_0);
KdPrint2((PRINT_PREFIX " AtaReq %#x: cmd aligned %I64x, d=%x\n", AtaReq, prd_base64, d));
#endif // DBG
AtaReq->ahci.ahci_cmd_ptr = (PIDE_AHCI_CMD)prd_base64;
KdPrint2((PRINT_PREFIX " ahci_cmd_ptr %#x\n", AtaReq->ahci.ahci_cmd_ptr));
reactos/drivers/storage/ide/uniata/uniata_ver.h
+2 -2
View File
@@ -6,5 +6,5 @@
#define UNIATA_VER_SUB_MN 1
#define UNIATA_VER_DOT_COMMA 0,44,2,1
#define UNIATA_VER_DOT_STR "0.44.2.1"
#define UNIATA_VER_YEAR 2012
#define UNIATA_VER_YEAR_STR "2012"
#define UNIATA_VER_YEAR 2013
#define UNIATA_VER_YEAR_STR "2013"