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- Implement more of the Ke386 ASM macros for MSVC.

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- Remove custom Set/Get Cr macros and use MSVC-compatible __read/__writecrX
- Remove custom WbInvd macro and use MSVC-compatible __wbinvd.

svn path=/trunk/; revision=24651
This commit is contained in:
Alex Ionescu
2006-10-25 17:15:11 +00:00
parent b5e25167e2
commit a900757d83
8 changed files with 227 additions and 71 deletions
Download Patch File Download Diff File Expand all files Collapse all files
reactos/boot/freeldr/freeldr/arch/i386/loader.c
+3 -3
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@@ -198,14 +198,14 @@ FrLdrSetupPae(ULONG Magic)
PageDirectoryBaseAddress = (ULONG_PTR)&startup_pagedirectorytable_pae;
/* Enable PAE */
Ke386SetCr4(Ke386GetCr4() | X86_CR4_PAE);
__writecr4(__readcr4() | X86_CR4_PAE);
}
/* Set the PDBR */
Ke386SetCr3(PageDirectoryBaseAddress);
__writecr3(PageDirectoryBaseAddress);
/* Enable Paging and Write Protect*/
Ke386SetCr0(Ke386GetCr0() | X86_CR0_PG | X86_CR0_WP);
__writecr0(__readcr0() | X86_CR0_PG | X86_CR0_WP);
/* Jump to Kernel */
PagedJump = (ASMCODE)(PVOID)(KernelEntryPoint);
reactos/boot/freeldr/freeldr/windows/wlmemory.c
+2 -2
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@@ -566,10 +566,10 @@ WinLdrTurnOnPaging(IN OUT PLOADER_PARAMETER_BLOCK LoaderBlock,
Ke386EraseFlags();
// Set the PDBR
Ke386SetCr3((ULONG_PTR)PDE);
__writecr3((ULONG_PTR)PDE);
// Enable paging by modifying CR0
Ke386SetCr0(Ke386GetCr0() | CR0_PG);
__writecr0(__readcr0() | CR0_PG);
// Set processor context
WinLdrSetProcessorContext(GdtIdt, KIP0PCRADDRESS, KSEG0_BASE | (TssBasePage << MM_PAGE_SHIFT));
reactos/ntoskrnl/ex/sysinfo.c
+1 -1
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@@ -1689,7 +1689,7 @@ NtFlushInstructionCache (
{
PAGED_CODE();
Ke386WbInvd();
__wbinvd();
return STATUS_SUCCESS;
}
reactos/ntoskrnl/include/internal/i386/intrin_i.h
+196 -40
View File
@@ -50,19 +50,12 @@
#define _Ke386SetSeg(N,X) __asm__ __volatile__("movl %0,%%" #N : :"r" (X));
#define _Ke386GetCr(N) ({ \
unsigned int __d; \
__asm__("movl %%cr" #N ",%0\n\t" :"=r" (__d)); \
__d; \
})
#define _Ke386GetDr(N) ({ \
unsigned int __d; \
__asm__("movl %%dr" #N ",%0\n\t" :"=r" (__d)); \
__d; \
})
#define _Ke386SetCr(N,X) __asm__ __volatile__("movl %0,%%cr" #N : :"r" (X));
#define _Ke386SetDr(N,X) __asm__ __volatile__("movl %0,%%dr" #N : :"r" (X));
#define Ke386SetTr(X) __asm__ __volatile__("ltr %%ax" : :"a" (X));
@@ -95,17 +88,33 @@ static inline void Ki386Cpuid(ULONG Op, PULONG Eax, PULONG Ebx, PULONG Ecx, PULO
#define Ke386HaltProcessor() __asm__("hlt\n\t");
#define Ke386FnInit() __asm__("fninit\n\t");
#define Ke386WbInvd() __asm__("wbinvd\n\t");
//
// DR Macros
//
#define Ke386GetDr0() _Ke386GetDr(0)
#define Ke386GetDr1() _Ke386GetDr(1)
#define Ke386SetDr0(X) _Ke386SetDr(0,X)
#define Ke386GetDr2() _Ke386GetDr(2)
#define Ke386SetDr2(X) _Ke386SetDr(2,X)
#define Ke386GetDr3() _Ke386GetDr(3)
#define Ke386GetDr4() _Ke386GetDr(4)
#define Ke386SetDr4(X) _Ke386SetDr(4,X)
#define Ke386GetDr6() _Ke386GetDr(6)
#define Ke386GetDr7() _Ke386GetDr(7)
#define Ke386SetDr7(X) _Ke386SetDr(7,X)
//
// Segment Macros
//
#define Ke386GetSs() _Ke386GetSeg(ss)
#define Ke386GetFs() _Ke386GetSeg(fs)
#define Ke386SetFs(X) _Ke386SetSeg(fs, X)
#define Ke386SetDs(X) _Ke386SetSeg(ds, X)
#define Ke386SetEs(X) _Ke386SetSeg(es, X)
#elif defined(_MSC_VER)
VOID
FORCEINLINE
Ke386WbInvd(VOID)
{
__asm wbinvd;
}
VOID
FORCEINLINE
Ke386FnInit(VOID)
@@ -162,40 +171,187 @@ Ke386SetLocalDescriptorTable(IN USHORT Descriptor)
__asm lldt Descriptor;
}
#else
#error Unknown compiler for inline assembler
#endif
VOID
FORCEINLINE
Ke386SaveFlags(IN ULONG Flags)
{
__asm pushf;
__asm pop Flags;
}
//
// CR Macros
//
#define Ke386GetCr0() _Ke386GetCr(0)
#define Ke386SetCr0(X) _Ke386SetCr(0,X)
#define Ke386GetCr2() _Ke386GetCr(2)
#define Ke386SetCr2(X) _Ke386SetCr(2,X)
#define Ke386GetCr3() _Ke386GetCr(3)
#define Ke386SetCr3(X) _Ke386SetCr(3,X)
#define Ke386GetCr4() _Ke386GetCr(4)
#define Ke386SetCr4(X) _Ke386SetCr(4,X)
VOID
FORCEINLINE
Ke386RestoreFlags(IN ULONG Flags)
{
__asm push Flags;
__asm popf;
}
VOID
FORCEINLINE
Ke386SetTr(IN USHORT Tr)
{
__asm ltr Tr;
}
USHORT
FORCEINLINE
Ke386GetTr(IN USHORT Tr)
{
__asm str Tr;
}
//
// DR Macros
//
#define Ke386GetDr0() _Ke386GetDr(0)
#define Ke386SetDr0(X) _Ke386SetDr(0,X)
#define Ke386GetDr2() _Ke386GetDr(2)
#define Ke386SetDr2(X) _Ke386SetDr(2,X)
#define Ke386GetDr4() _Ke386GetDr(4)
#define Ke386SetDr4(X) _Ke386SetDr(4,X)
ULONG
FORCEINLINE
Ke386GetDr0(VOID)
{
__asm mov eax, dr0;
}
ULONG
FORCEINLINE
Ke386GetDr1(VOID)
{
__asm mov eax, dr1;
}
ULONG
FORCEINLINE
Ke386GetDr2(VOID)
{
__asm mov eax, dr2;
}
ULONG
FORCEINLINE
Ke386GetDr3(VOID)
{
__asm mov eax, dr3;
}
ULONG
FORCEINLINE
Ke386GetDr6(VOID)
{
__asm mov eax, dr6;
}
ULONG
FORCEINLINE
Ke386GetDr7(VOID)
{
__asm mov eax, dr7;
}
VOID
FORCEINLINE
Ke386SetDr0(IN ULONG Value)
{
__asm mov eax, Value;
__asm mov dr0, eax;
}
VOID
FORCEINLINE
Ke386SetDr2(IN ULONG Value)
{
__asm mov eax, Value;
__asm mov dr2, eax;
}
VOID
FORCEINLINE
Ke386SetDr3(IN ULONG Value)
{
__asm mov eax, Value;
__asm mov dr3, eax;
}
VOID
FORCEINLINE
Ke386SetDr6(IN ULONG Value)
{
__asm mov eax, Value;
__asm mov dr6, eax;
}
VOID
FORCEINLINE
Ke386SetDr7(IN ULONG Value)
{
__asm mov eax, Value;
__asm mov dr7, eax;
}
//
// Segment Macros
//
#define Ke386GetSs() _Ke386GetSeg(ss)
#define Ke386GetFs() _Ke386GetSeg(fs)
#define Ke386SetFs(X) _Ke386SetSeg(fs, X)
#define Ke386SetDs(X) _Ke386SetSeg(ds, X)
#define Ke386SetEs(X) _Ke386SetSeg(es, X)
USHORT
FORCEINLINE
Ke386GetSs(VOID)
{
__asm mov ax, ss;
}
USHORT
FORCEINLINE
Ke386GetFs(VOID)
{
__asm mov ax, fs;
}
USHORT
FORCEINLINE
Ke386GetDs(VOID)
{
__asm mov ax, ds;
}
USHORT
FORCEINLINE
Ke386GetEs(VOID)
{
__asm mov ax, es;
}
VOID
FORCEINLINE
Ke386SetSs(IN USHORT Value)
{
__asm mov ax, Value;
__asm mov ss, ax;
}
VOID
FORCEINLINE
Ke386SetFs(IN USHORT Value)
{
__asm mov ax, Value;
__asm mov fs, ax;
}
VOID
FORCEINLINE
Ke386SetDs(IN USHORT Value)
{
__asm mov ax, Value;
__asm mov ds, ax;
}
VOID
FORCEINLINE
Ke386SetEs(IN USHORT Value)
{
__asm mov ax, Value;
__asm mov es, ax;
}
#else
#error Unknown compiler for inline assembler
#endif
#endif
reactos/ntoskrnl/ke/i386/cpu.c
+18 -18
View File
@@ -511,13 +511,13 @@ KiSetCR0Bits(VOID)
ULONG Cr0;
/* Save current CR0 */
Cr0 = Ke386GetCr0();
Cr0 = __readcr0();
/* If this is a 486, enable Write-Protection */
if (KeGetCurrentPrcb()->CpuType > 3) Cr0 |= CR0_WP;
/* Set new Cr0 */
Ke386SetCr0(Cr0);
__writecr0(Cr0);
}
VOID
@@ -601,7 +601,7 @@ Ki386InitializeTss(IN PKTSS Tss,
/* Initialize the TSS used for handling double faults. */
Tss = (PKTSS)KiDoubleFaultTSS;
KiInitializeTSS(Tss);
Tss->CR3 = _Ke386GetCr(3);
Tss->CR3 = __readcr3();
Tss->Esp0 = PtrToUlong(KiDoubleFaultStack);
Tss->Eip = PtrToUlong(KiTrap8);
Tss->Cs = KGDT_R0_CODE;
@@ -630,7 +630,7 @@ Ki386InitializeTss(IN PKTSS Tss,
/* Initialize the actual TSS */
Tss = (PKTSS)KiNMITSS;
KiInitializeTSS(Tss);
Tss->CR3 = _Ke386GetCr(3);
Tss->CR3 = __readcr3();
Tss->Esp0 = PtrToUlong(KiDoubleFaultStack);
Tss->Eip = PtrToUlong(KiTrap2);
Tss->Cs = KGDT_R0_CODE;
@@ -655,7 +655,7 @@ NTAPI
KeFlushCurrentTb(VOID)
{
/* Flush the TLB by resetting CR3 */
_Ke386SetCr(3, _Ke386GetCr(3));
__writecr3((ULONGLONG)__readcr3);
}
VOID
@@ -663,19 +663,19 @@ NTAPI
KiSaveProcessorControlState(IN PKPROCESSOR_STATE ProcessorState)
{
/* Save the CR registers */
ProcessorState->SpecialRegisters.Cr0 = _Ke386GetCr(0);
ProcessorState->SpecialRegisters.Cr2 = _Ke386GetCr(2);
ProcessorState->SpecialRegisters.Cr3 = _Ke386GetCr(3);
ProcessorState->SpecialRegisters.Cr4 = _Ke386GetCr(4);
ProcessorState->SpecialRegisters.Cr0 = __readcr0();
ProcessorState->SpecialRegisters.Cr2 = __readcr2();
ProcessorState->SpecialRegisters.Cr3 = __readcr3();
ProcessorState->SpecialRegisters.Cr4 = __readcr4();
/* Save the DR registers */
ProcessorState->SpecialRegisters.KernelDr0 = _Ke386GetDr(0);
ProcessorState->SpecialRegisters.KernelDr1 = _Ke386GetDr(1);
ProcessorState->SpecialRegisters.KernelDr2 = _Ke386GetDr(2);
ProcessorState->SpecialRegisters.KernelDr3 = _Ke386GetDr(3);
ProcessorState->SpecialRegisters.KernelDr6 = _Ke386GetDr(6);
ProcessorState->SpecialRegisters.KernelDr7 = _Ke386GetDr(7);
_Ke386SetDr(7, 0);
ProcessorState->SpecialRegisters.KernelDr0 = Ke386GetDr0();
ProcessorState->SpecialRegisters.KernelDr1 = Ke386GetDr1();
ProcessorState->SpecialRegisters.KernelDr2 = Ke386GetDr2();
ProcessorState->SpecialRegisters.KernelDr3 = Ke386GetDr3();
ProcessorState->SpecialRegisters.KernelDr6 = Ke386GetDr6();
ProcessorState->SpecialRegisters.KernelDr7 = Ke386GetDr7();
Ke386SetDr7(0);
/* Save GDT, IDT, LDT and TSS */
Ke386GetGlobalDescriptorTable(ProcessorState->SpecialRegisters.Gdtr);
@@ -724,7 +724,7 @@ NTAPI
Ki386EnableDE(IN ULONG_PTR Context)
{
/* Enable DE */
Ke386SetCr4(Ke386GetCr4() | CR4_DE);
__writecr4(__readcr4() | CR4_DE);
return 0;
}
@@ -733,7 +733,7 @@ NTAPI
Ki386EnableFxsr(IN ULONG_PTR Context)
{
/* Enable FXSR */
Ke386SetCr4(Ke386GetCr4() | CR4_FXSR);
__writecr4(__readcr4() | CR4_FXSR);
return 0;
}
reactos/ntoskrnl/ke/i386/patpge.c
+5 -5
View File
@@ -38,15 +38,15 @@ Ki386EnableGlobalPage(IN volatile ULONG_PTR Context)
}
/* Now get CR4 and make sure PGE is masked out */
Cr4 = Ke386GetCr4();
Ke386SetCr4(Cr4 & ~CR4_PGE);
Cr4 = __readcr4();
__writecr4(Cr4 & ~CR4_PGE);
/* Flush the TLB */
Cr3 = Ke386GetCr3();
Ke386SetCr3(Cr3);
Cr3 = __readcr3();
__writecr3(Cr3);
/* Now enable PGE */
Ke386SetCr4(Cr4 | CR4_PGE);
__writecr4(Cr4 | CR4_PGE);
Ke386GlobalPagesEnabled = TRUE;
/* Restore interrupts */
reactos/ntoskrnl/mm/i386/page.c
+1 -1
View File
@@ -122,7 +122,7 @@ MiFlushTlb(PULONG Pt, PVOID Address)
PULONG
MmGetPageDirectory(VOID)
{
return (PULONG)Ke386GetCr3();
return (PULONG)__readcr3();
}
static ULONG
reactos/ntoskrnl/mm/i386/pfault.c
+1 -1
View File
@@ -37,7 +37,7 @@ ULONG KiPageFaultHandler(PKTRAP_FRAME Tf, ULONG ExceptionNr)
ASSERT(ExceptionNr == 14);
/* get the faulting address */
cr2 = Ke386GetCr2();
cr2 = __readcr2();
Tf->DbgArgPointer = cr2;
/* it's safe to enable interrupts after cr2 has been saved */