change the gdt in freeldr, so we will have the same longmode cs later in the kernel.

svn path=/branches/ros-amd64-bringup/; revision=35445

reactos/boot/freeldr/freeldr/arch/amd64/arch.S

@@ -267,15 +267,16 @@ code64ret:
 	.quad 0
 
 gdt:
-	.quad 0x0000000000000000
-	.quad 0x0020980000000000
-	.quad 0x0000900000000000
+	.quad 0x0000000000000000 /* 00: NULL descriptor */
+	.quad 0x0000000000000000 /* 08:  */
+	.quad 0x0020980000000000 /* 10: long mode cs */
+	.quad 0x0000900000000000 /* 18: long mode ds */
 	.word	0xFFFF, 0x0000, 0x9E00, 0x0000 /* 16-bit real mode CS */
 	.word	0xFFFF, 0x0000, 0x9200, 0x0000 /* 16-bit real mode DS */
 
 /* GDT table pointer */
 gdtptr:
-	.word	0x27		/* Limit */
+	.word	0x2f		/* Limit */
 	.long	gdt			/* Base Address */
 
 

reactos/boot/freeldr/freeldr/include/arch.h

@@ -25,12 +25,14 @@
 #include <arch/amd64/amd64.h>
 #endif
 
+#if defined (_M_IX86)
 /* Defines needed for switching between real and protected mode */
 #define NULL_DESC	0x00	/* NULL descriptor */
 #define PMODE_CS	0x08	/* PMode code selector, base 0 limit 4g */
 #define PMODE_DS	0x10	/* PMode data selector, base 0 limit 4g */
 #define RMODE_CS	0x18	/* RMode code selector, base 0 limit 64k */
 #define RMODE_DS	0x20	/* RMode data selector, base 0 limit 64k */
+#endif
 
 #define CR0_PE_SET	0x00000001	/* OR this value with CR0 to enable pmode */
 #define CR0_PE_CLR	0xFFFFFFFE	/* AND this value with CR0 to disable pmode */

reactos/boot/freeldr/freeldr/include/arch/amd64/amd64.h

@@ -24,8 +24,10 @@
 #define STACK64ADDR	0x74000	/* The 64-bit stack top will be at 0x74000 */
 
 /* Long mode selectors */
-#define LMODE_CS	0x08
-#define LMODE_DS	0x10
+#define LMODE_CS	0x10
+#define LMODE_DS	0x18
+#define RMODE_CS	0x20	/* RMode code selector, base 0 limit 64k */
+#define RMODE_DS	0x28	/* RMode data selector, base 0 limit 64k */
 
 #define VA_MASK 0x0000FFFFFFFFFFFFUL