ApfelTeeSaft/DotNesJit
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Author SHA1 Message Date
ApfelTeeSaft 15d788789f Add interpreter fallback for self-modifying code 2026-01-22 07:55:52 +01:00
KallDrexx d8afeccbc6 Fixed color palette 2026-01-20 19:48:07 -05:00
KallDrexx a455bc44ae Support recompilation of self modifying functions. 
When a function modifies itself via INC, DEC, STY, STA, or STX calls, the
HAL now notices this. The current function will be returned (without
stack modifications) and the next function's address will be the next
instruction to execute. This will trigger the JIT recompilation and thus
will successfully reload.
 2026-01-19 21:18:15 -05:00
KallDrexx 633a0fc8c0 Initial detection of self modifying code 2026-01-19 17:25:49 -05:00
KallDrexx df3450f8bc Add CIA interrupt checking, debug hook for ram devices 2026-01-19 16:18:46 -05:00
KallDrexx 861d0f0075 bypass keyboard by by transposing row/col 2026-01-17 16:44:02 -05:00
KallDrexx 3384fab3e1 Initial keyboard support. Returning wrong keys 2026-01-17 15:15:29 -05:00
KallDrexx 0fcce79de0 Updated to main branch of NES decompiler for loopback fix 2026-01-17 12:10:57 -05:00
KallDrexx 25a821502f Fixed crash on returning from IRQ due to trying to decompile a virtual/fake instruction 2026-01-17 11:55:57 -05:00
KallDrexx a163dcadf7 VIC generates IRQ. Might have exposed decompilation bug 2026-01-15 23:18:15 -05:00
KallDrexx 5efd9dd23e CIA implementation 2026-01-15 20:59:46 -05:00
KallDrexx f6b4ac4ee8 Standard text mode now renders 2026-01-14 21:57:15 -05:00
KallDrexx 987ac2cfde vic-2 work 2026-01-14 21:30:03 -05:00
KallDrexx ac08eb5c21 Implemented badlines and started c-access 2026-01-13 21:54:21 -05:00
KallDrexx c8c277e875 Fixed border sizes 2026-01-13 20:51:44 -05:00
KallDrexx bf79580291 Fixed incorrect render dimension calculations 2026-01-13 20:23:56 -05:00
KallDrexx b960f1d6c5 Fix PLA to properly load io area as writable to d0000 2026-01-12 22:13:06 -05:00
KallDrexx c5ece68895 Fix get code regions to adhere to memory bus override regions 2026-01-12 21:49:46 -05:00
KallDrexx ccb2aaa7ed Updated memory mapping to allow more flexible routing 2026-01-06 22:57:24 -05:00
KallDrexx 3431402417 More work towards cia implementation 2026-01-05 23:23:49 -05:00
KallDrexx 0fd5e82aeb CIA chip wip 2026-01-05 21:59:24 -05:00
KallDrexx 5b22b32b99 Make memory bus reusable so the Io memory area can be segmented to multiple devices 2026-01-05 21:24:23 -05:00
KallDrexx 0e590093d7 Fixed improper ranges 2026-01-05 20:33:04 -05:00
KallDrexx 29378a39e3 Updated color palette 2026-01-05 20:23:34 -05:00
KallDrexx bcd8457d98 Fixed incorrect dots per scanline 2026-01-04 21:46:20 -05:00
KallDrexx f612eb2636 Added debugging/logging support 2026-01-04 16:10:30 -05:00
KallDrexx 224590167d More vic-ii work 2026-01-03 20:41:49 -05:00
KallDrexx 8e41f54cda More vic-ii work 2026-01-03 16:00:33 -05:00
KallDrexx ac1aba72dd Moving towards Vic-II implementation 2026-01-02 21:55:23 -05:00
KallDrexx ed4e0d6206 Added bare bones vic-II and execution infrastructure 2026-01-01 21:44:02 -05:00
KallDrexx add3df270c Removed debug hooks for adc and sbc 2026-01-01 20:04:10 -05:00
KallDrexx 57b9798d3a SBC works in decimal mode. 
Only 1 test case out of 80,000 SBC test cases fail due to an
incorrect zero flag value (off but expected to be on). Going to
punt investigating that for now
 2026-01-01 19:54:47 -05:00
KallDrexx b66578de77 Initial decimal mode support 2026-01-01 15:33:13 -05:00
KallDrexx cf93709692 Add logical not operator 2026-01-01 14:58:05 -05:00
KallDrexx de86234709 wip 2025-12-31 22:00:27 -05:00
KallDrexx 5558e418e0 Adc with BCD suport for overflow negative, and zero flags 2025-12-31 15:36:14 -05:00
KallDrexx 6fe19d8bbe Testrunner ignore N and V flags in bcd mode 2025-12-31 15:24:31 -05:00
KallDrexx a7d960e457 Revert "Adc with BCD suport for overflow and negative flags" 
This reverts commit 3ab84f4152.
 2025-12-31 14:52:08 -05:00
KallDrexx 3ab84f4152 Adc with BCD suport for overflow and negative flags 2025-12-31 14:02:32 -05:00
KallDrexx 967130dfd6 ADC with BCD correctly sets zero flag now 2025-12-31 10:10:42 -05:00
KallDrexx 5132736899 Initial ADC with BCD support test cases passing 2025-12-30 21:47:57 -05:00
KallDrexx 730f5bc970 Csproj cleanup and always pass unused processor status bit as 1, per 6502 spec 2025-12-30 15:32:34 -05:00
KallDrexx 05b32148d7 Bulk memory changed notifications support in cache 2025-12-30 10:00:23 -05:00
KallDrexx 7488c67936 Memory tweaks and command line parsing 2025-12-29 21:53:16 -05:00
KallDrexx f34c40bffa Initial c64 memory mapping 2025-12-29 15:59:42 -05:00
KallDrexx 4108b821ce Move page lookups for cache into function retrieval operation instead of memory changed event, since the former happens less often 2025-12-24 20:29:36 -05:00
KallDrexx b646d9f386 Add the ability to invalidate cached functions with instructions 
at a specific page boundary, and wired up the JIT engine to invalide
the pages at any memory write operation (since the memory bus has no
idea if there are any cached functions at the changed address).

This also creates an LRU to the cached functions, preventing the
cached function list to infinitely grow.
 2025-12-24 16:41:14 -05:00
KallDrexx aaf4f89cf8 Moved executable method caching to its own class 2025-12-21 17:18:40 -05:00
KallDrexx 781b3486ac .net 10 upgrade, comment out unused variables 2025-12-18 21:08:57 -05:00
KallDrexx 795d5a11c2 Add nes timing mechanism 2025-10-21 00:26:42 -04:00