mirror of
https://github.com/ApfelTeeSaft/reactos.git
synced 2026-08-26 19:33:31 +00:00
Dmitry Borisov
82ef7e5d04
Do not rely on a hardcoded ASM instruction offset.
Addendum to commit 45e6d49a29.
CORE-17977
128 lines
2.6 KiB
ArmAsm
128 lines
2.6 KiB
ArmAsm
/*
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* PROJECT: NEC PC-98 series HAL
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* LICENSE: GPL-2.0-or-later (https://spdx.org/licenses/GPL-2.0-or-later)
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* PURPOSE: Busy-wait loop implementation
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* COPYRIGHT: Copyright 2026 Dmitry Borisov <di.sean@protonmail.com>
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*/
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/* INCLUDES ******************************************************************/
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#include <asm.inc>
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#include <ks386.inc>
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#include "delay.h"
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/* GLOBALS *******************************************************************/
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#define PIC1_CONTROL_PORT HEX(00)
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#define PIC1_DATA_PORT HEX(02)
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#define PIC2_CONTROL_PORT HEX(08)
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#define PIC2_DATA_PORT HEX(0A)
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#define PIC_EOI HEX(20)
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#define MSR_RDTSC HEX(10)
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/* FUNCTIONS *****************************************************************/
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.code
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#ifdef _USE_ML
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INIT_ASM SEGMENT PARA PUBLIC USE32 READ WRITE EXECUTE DISCARD
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#endif
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PUBLIC _HalpTscCalibrationISR
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_HalpTscCalibrationISR:
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push edx
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push ecx
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push eax
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/* The first thing we do is read the current TSC value */
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rdtsc
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mov ecx, dword ptr ds:[_TscCalibrationPhase]
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/* Ignore the first interrupt since it fires randomly */
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test ecx, ecx
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je .FirstInterrupt
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/* Check if we're already done */
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cmp ecx, NUM_SAMPLES
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ja .Done
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/* Store the current TSC value (the phase number is 1-based) */
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mov dword ptr ds:[ecx*8 + _TscCalibrationArray + 0 - 8], eax
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mov dword ptr ds:[ecx*8 + _TscCalibrationArray + 4 - 8], edx
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jmp .AdvancePhase
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.FirstInterrupt:
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/* Reset TSC value to 0 */
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mov ecx, MSR_RDTSC
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xor eax, eax
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xor edx, edx
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wrmsr
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.AdvancePhase:
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inc dword ptr ds:[_TscCalibrationPhase]
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.Done:
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/* Send the EOI for the IRQ */
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mov al, PIC_EOI
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out PIC1_CONTROL_PORT, al
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pop eax
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pop ecx
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pop edx
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iretd
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.align 8
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PUBLIC _TscCalibrationArray
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_TscCalibrationArray:
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.space NUM_SAMPLES * 8
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PUBLIC _TscCalibrationPhase
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_TscCalibrationPhase:
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.long 0
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#ifdef _USE_ML
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INIT_ASM ENDS
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#endif
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PUBLIC _KeStallExecutionProcessor@4
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_KeStallExecutionProcessor@4:
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push ebx
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/*
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* Force the in-order execution of the RDTSC instruction.
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* HAL will overwrite this with a no-op instruction on older processors.
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*/
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PUBLIC _HalpStallExecutionSerialize
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_HalpStallExecutionSerialize:
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xor eax, eax
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cpuid
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/* Get the initial time */
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rdtsc
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/* Calculate the ending time */
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mov ecx, eax
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mov eax, fs:[KPCR_STALL_SCALE_FACTOR]
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mov ebx, edx
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mul dword ptr [esp + 8]
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add ecx, eax
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adc ebx, edx
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/* Loop until time is elapsed */
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.Loop:
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rdtsc
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cmp eax, ecx
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mov eax, edx
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sbb eax, ebx
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jc .Loop
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pop ebx
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ret 4
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END
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