Aleksandar Andrejevic
b456a8b355
[FAST486]
...
Make the parameters to Fast486ReadModrm*Operands optional, so that
unnecessary extra reads aren't performed. This also eliminates the
need for dummy variables.
svn path=/branches/ntvdm/; revision=61055
2013-11-20 08:01:10 +00:00
Aleksandar Andrejevic
cdf876ead9
[FAST486]
...
Fix the BSF and BSR instructions. Partially fix SHLD and SHRD.
svn path=/branches/ntvdm/; revision=60987
2013-11-14 02:39:54 +00:00
Aleksandar Andrejevic
cd496c8e21
[FAST486]
...
XADD: Fix the order of operations.
POP <modrm>: The value must be popped from the stack before parsing the
Mod-Reg-R/M, because of the "POP DWORD [ESP]" case.
svn path=/branches/ntvdm/; revision=60984
2013-11-13 22:33:37 +00:00
Aleksandar Andrejevic
ace025dca9
[FAST486]
...
The bit number should be normalized to [0, DataSize- 1], not [0, 2 ^ DataSize - 1].
svn path=/branches/ntvdm/; revision=60975
2013-11-13 18:14:01 +00:00
Aleksandar Andrejevic
2da0e38fbc
[FAST486]
...
In rotate operations, the count is always masked with 0x1F, regardless
of the operand size.
svn path=/branches/ntvdm/; revision=60966
2013-11-12 19:25:50 +00:00
Aleksandar Andrejevic
ac9f8a81e3
[FAST486]
...
Don't forget to check for the operand/address size prefix.
svn path=/branches/ntvdm/; revision=60964
2013-11-12 18:40:13 +00:00
Aleksandar Andrejevic
f3df799dc2
[FAST486]
...
Implement the LSS instruction.
Fix a bug in LFS and LGS.
svn path=/branches/ntvdm/; revision=60935
2013-11-11 03:14:18 +00:00
Aleksandar Andrejevic
153e815f93
[FAST486]
...
We don't support in-circuit emulation opcodes such as USERMOV.
The 486 does not have the JMPE or POPCNT instructions.
svn path=/branches/ntvdm/; revision=60932
2013-11-11 01:14:24 +00:00
Aleksandar Andrejevic
83b597be5a
[FAST486]
...
Implement SHLD and SHRD.
svn path=/branches/ntvdm/; revision=60930
2013-11-11 00:57:59 +00:00
Aleksandar Andrejevic
43bbc0afb4
[FAST486]
...
Implement the two operand version of IMUL.
svn path=/branches/ntvdm/; revision=60929
2013-11-11 00:10:46 +00:00
Hermès Bélusca-Maïto
a106a3b21e
[FAST486]: Code formatting only (remove endlines spaces).
...
svn path=/branches/ntvdm/; revision=60894
2013-11-09 14:23:40 +00:00
Aleksandar Andrejevic
4f4d9fe5d2
[FAST486]
...
Implement LFS, LGS and MOVZX.
svn path=/branches/ntvdm/; revision=60878
2013-11-07 01:06:39 +00:00
Aleksandar Andrejevic
01c10ef5aa
[FAST486]
...
Implement BSF, BSR and MOVSX.
svn path=/branches/ntvdm/; revision=60877
2013-11-07 00:57:08 +00:00
Hermès Bélusca-Maïto
92ce0174ac
[FAST486]: Code formatting only.
...
svn path=/branches/ntvdm/; revision=60857
2013-11-03 23:13:53 +00:00
Hermès Bélusca-Maïto
3b6b1a7f37
[FAST486]: Replace (boolean_condition) ? TRUE : FALSE; by: (boolean_condition) .
...
svn path=/branches/ntvdm/; revision=60856
2013-11-03 22:44:55 +00:00
Aleksandar Andrejevic
dcbdbb7d9f
[FAST486]
...
Implement opcode group 0x0F, 0x01 (SGDT, SIDT, LGDT, LIDT, SMSW and LMSW).
Only INVLPG is not implemented yet.
svn path=/branches/ntvdm/; revision=60824
2013-11-01 22:39:43 +00:00
Aleksandar Andrejevic
20c0db9f08
[FAST486]
...
Implement the XADD instruction.
svn path=/branches/ntvdm/; revision=60819
2013-11-01 02:48:28 +00:00
Hermès Bélusca-Maïto
2c8e8ba5d3
[FAST486]
...
- Remove an unneeded inclusion to the CRT header: limits.h (and use instead NDK definitions for max/min long values).
- Remove unneeded comments...
[NTVDM]
Remove an unneeded add_dependencies(...) command.
svn path=/branches/ntvdm/; revision=60767
2013-10-27 11:42:44 +00:00
Aleksandar Andrejevic
dfd1c031d6
[FAST486]
...
Implement the CLTS instruction.
svn path=/branches/ntvdm/; revision=60752
2013-10-26 17:33:10 +00:00
Aleksandar Andrejevic
1525a235a2
[FAST486]
...
Implement the MOV instruction for control and debug registers.
Remove definitions for non-existant registers CR1, CR4, CR5, CR6 and CR7.
The standard 80486 doesn't have a CR4 register (although some implementations
of the 80486 had large page support and CR4, it was not reliable).
As for the debug registers, DR4 is the same as DR6, and DR5 is the same as DR7.
svn path=/branches/ntvdm/; revision=60747
2013-10-26 00:56:11 +00:00
Aleksandar Andrejevic
87f5903d48
[FAST486]
...
Implement extended opcode groups 0xB9 (UD2) and 0xBA (BT/BTS/BTR/BTC).
svn path=/branches/ntvdm/; revision=60745
2013-10-25 18:15:24 +00:00
Aleksandar Andrejevic
67b093f38c
[FAST486]
...
Create a macro SWAP (swaps two variables) to shorten the code.
Implement the BSWAP instruction.
svn path=/branches/ntvdm/; revision=60717
2013-10-20 00:55:31 +00:00
Aleksandar Andrejevic
a93095e678
[FAST486]
...
Implement BT, BTS, BTR and BTC.
svn path=/branches/ntvdm/; revision=60716
2013-10-20 00:25:41 +00:00
Aleksandar Andrejevic
1a968e6f61
[FAST486]
...
Fix more prefix handling.
Create the macros TOGGLE_ADSIZE and TOGGLE_OPSIZE to shorten the code.
svn path=/branches/ntvdm/; revision=60715
2013-10-19 23:43:53 +00:00
Aleksandar Andrejevic
75a0ca07a1
[FAST486]
...
Implement CMPXCHG.
svn path=/branches/ntvdm/; revision=60712
2013-10-19 18:56:58 +00:00
Aleksandar Andrejevic
a98544e517
[FAST486]
...
Implement PUSH/POP FS/GS.
svn path=/branches/ntvdm/; revision=60711
2013-10-19 18:36:04 +00:00
Aleksandar Andrejevic
ca7d21eff4
[FAST486]
...
The 80486 doesn't have any time stamp counter (TSC) at all.
svn path=/branches/ntvdm/; revision=60710
2013-10-19 18:28:27 +00:00
Aleksandar Andrejevic
d3bc33ee5d
[FAST486]
...
And add those newly implemented opcodes into the table...
svn path=/branches/ntvdm/; revision=60708
2013-10-19 18:00:19 +00:00
Aleksandar Andrejevic
7105c52d86
[FAST486]
...
Implement SETO, SETNO, SETC, SETNC, SETZ, SETNZ, SETBE, SETNBE, SETS, SETNS, SETP
SETNP, SETL, SETNL, SETLE and SETNLE.
svn path=/branches/ntvdm/; revision=60706
2013-10-19 17:57:26 +00:00
Aleksandar Andrejevic
2583e4f51e
[FAST486]
...
Remove TODOs for instructions that don't exist on the 80486.
svn path=/branches/ntvdm/; revision=60704
2013-10-19 17:29:44 +00:00
Hermès Bélusca-Maïto
51040fc61e
Bye bye Soft386, welcome Fast486, courtesy Aleksandar Andrejevic.
...
[NTVDM]: Define by default NEW_EMULATOR, i.e. use Fast486 instead of softx86.
svn path=/branches/ntvdm/; revision=60703
2013-10-19 16:55:51 +00:00