Make the parameters to Fast486ReadModrm*Operands optional, so that
unnecessary extra reads aren't performed. This also eliminates the
need for dummy variables.
svn path=/branches/ntvdm/; revision=61055
- When accessing memory using ESP, make the SS segment default.
- The INT instructions always pushes 16-bit values in real mode, regardless
of the operand/address size attributes.
svn path=/branches/ntvdm/; revision=61000
- Fix the privilege checks.
- Store the CPL in a special field, so that it doesn't get mixed up
with the lowest 2 bits of real mode selectors while switching
into protected mode.
- Reset the exception count after a successful ISR call.
- In Fast486OpcodeGroup0F01, check for prefix overrides after parsing
the Mod-Reg-R/M, which might add a SS: prefix override in some cases.
svn path=/branches/ntvdm/; revision=60995
XADD: Fix the order of operations.
POP <modrm>: The value must be popped from the stack before parsing the
Mod-Reg-R/M, because of the "POP DWORD [ESP]" case.
svn path=/branches/ntvdm/; revision=60984
Fix the Mod-Reg-R/M parser. EBP cannot be used as a SIB byte base,
instead it's used to mark that the base is an immediate operand.
svn path=/branches/ntvdm/; revision=60944
We don't support in-circuit emulation opcodes such as USERMOV.
The 486 does not have the JMPE or POPCNT instructions.
svn path=/branches/ntvdm/; revision=60932
Modularize linear memory access by adding two new functions:
Fast486ReadLinearMemory and Fast486WriteLinearMemory.
Implement Fast486GetPageTableEntry.
svn path=/branches/ntvdm/; revision=60923
The number of bit places in a shift operation is ANDed by the width of the type
when it is in a register, so (1 << c), when c is 32, is actually 1, and not 0.
Fix the calculation of MaxValue by using SignFlag | (SignFlag - 1) instead.
svn path=/branches/ntvdm/; revision=60912
Don't enable interrupts unless it's necessary in the interrupt handler.
[FAST486]
When handling interrupt signals, make sure at least one instruction is executed,
to prevent the CPU from being completely blocked by interrupt signals.
svn path=/branches/ntvdm/; revision=60910
The behavior of the I/O port bus depends on the data width. In the case
of 16-bit/32-bit access, two/four adjacent ports will be accessed.
svn path=/branches/ntvdm/; revision=60891
Fix segment initialization. The cached descriptors must have valid values
during the switch to protected mode.
For some odd reason, GCC makes the FAST486_GDT_ENTRY structure 12 bytes
instead of 8 if there is a bit field with more than 16 bits, so split
the Base field into Base and BaseMid.
Add size checks below important structure declarations.
svn path=/branches/ntvdm/; revision=60825
Implement opcode group 0x0F, 0x01 (SGDT, SIDT, LGDT, LIDT, SMSW and LMSW).
Only INVLPG is not implemented yet.
svn path=/branches/ntvdm/; revision=60824
Fix the type of a variable.
[NTVDM]
Introduce a BOP handler table for the 256 possible BOP functions and use it.
svn path=/branches/ntvdm/; revision=60818
