Move the prefix reset below the interrupt check, because Fast486InterruptInternal
might set OPSIZE in some circumstances.
svn path=/branches/ntvdm/; revision=61158
FPU instructions never generate #UD. If CR0.EM is set, they generate #NM.
If there is no FPU and CR0.EM is cleared, they do nothing.
Add a helper macro FPU_ST for accessing FPU registers.
Add a compile-time option to disable the FPU.
svn path=/branches/ntvdm/; revision=61150
Handle the case when the last page is also the first page in Fast486ReadLinearMemory ( when paging is enabled).
svn path=/branches/ntvdm/; revision=61104
The 486 doesn't have AC, VIF, VIP or ID.
Fix and simplify POPF.
[NTVDM]
Fix the count in the XMS copy function (INT 15h, AH = 87h).
svn path=/branches/ntvdm/; revision=61082
DAA, DAS: Update the flags.
AAA, AAS: Subtract from AX instead of AL. The specification says AL, but
so far in all known CPUs and emulators, AX is subtracted.
AAD: Clear AH.
svn path=/branches/ntvdm/; revision=61069
Make the parameters to Fast486ReadModrm*Operands optional, so that
unnecessary extra reads aren't performed. This also eliminates the
need for dummy variables.
svn path=/branches/ntvdm/; revision=61055
- When accessing memory using ESP, make the SS segment default.
- The INT instructions always pushes 16-bit values in real mode, regardless
of the operand/address size attributes.
svn path=/branches/ntvdm/; revision=61000
- Fix the privilege checks.
- Store the CPL in a special field, so that it doesn't get mixed up
with the lowest 2 bits of real mode selectors while switching
into protected mode.
- Reset the exception count after a successful ISR call.
- In Fast486OpcodeGroup0F01, check for prefix overrides after parsing
the Mod-Reg-R/M, which might add a SS: prefix override in some cases.
svn path=/branches/ntvdm/; revision=60995
XADD: Fix the order of operations.
POP <modrm>: The value must be popped from the stack before parsing the
Mod-Reg-R/M, because of the "POP DWORD [ESP]" case.
svn path=/branches/ntvdm/; revision=60984
Fix the Mod-Reg-R/M parser. EBP cannot be used as a SIB byte base,
instead it's used to mark that the base is an immediate operand.
svn path=/branches/ntvdm/; revision=60944
We don't support in-circuit emulation opcodes such as USERMOV.
The 486 does not have the JMPE or POPCNT instructions.
svn path=/branches/ntvdm/; revision=60932
Modularize linear memory access by adding two new functions:
Fast486ReadLinearMemory and Fast486WriteLinearMemory.
Implement Fast486GetPageTableEntry.
svn path=/branches/ntvdm/; revision=60923
