diff --git a/lib/3rdparty/CMakeLists.txt b/lib/3rdparty/CMakeLists.txt index 64284855c15..13bef592b45 100644 --- a/lib/3rdparty/CMakeLists.txt +++ b/lib/3rdparty/CMakeLists.txt @@ -8,7 +8,6 @@ add_subdirectory(libmpg123) add_subdirectory(libsamplerate) add_subdirectory(libwine) add_subdirectory(libxml2) -add_subdirectory(softx86) if(MSVC) add_subdirectory(stlport) endif() diff --git a/lib/3rdparty/softx86/CMakeLists.txt b/lib/3rdparty/softx86/CMakeLists.txt deleted file mode 100644 index 71fc4b0bbd9..00000000000 --- a/lib/3rdparty/softx86/CMakeLists.txt +++ /dev/null @@ -1,3 +0,0 @@ - -add_subdirectory(softx86) -add_subdirectory(softx87) diff --git a/lib/3rdparty/softx86/Makefile b/lib/3rdparty/softx86/Makefile deleted file mode 100644 index e22641ca512..00000000000 --- a/lib/3rdparty/softx86/Makefile +++ /dev/null @@ -1,56 +0,0 @@ -# Linux makefile for compiling SOFTX86 -# (C) 2003 Jonathan Campbell all rights reserved. -# -# Requirements: -# GCC 3.xx -# NASM 0.95 and better -# -# This Makefile really just calls Make to compile sub-projects. - -# make it all -all:: __autodetect_softx87 __autodetect_nasm - make -C samples - make -C softx86 - if [ -d softx87 ]; then make -C softx87; fi - make -C softx86dbg - -# clean it all -clean:: __fake_makes - make -C samples clean - make -C softx86 clean - if [ -d softx87 ]; then make -C softx87 clean; fi - make -C softx86dbg clean - -# clean it all for distribution -distclean:: __fake_makes - make -C samples distclean - make -C softx86 distclean - if [ -d softx87 ]; then make -C softx87 distclean; fi - make -C softx86dbg distclean - rm -f softx86dbg/Makefile.softx86 - rm -f samples/Makefile.nasm - rm -f lib/*.exp # clean up excess files from MSVC++ - rm -f softx86.ncb - rm -f softx86.opt - -# copy libsoftx86 and friends to the /usr/include and /usr/lib directories. -install:: - if [ -f install.sh ]; then sh install.sh; fi - -# run shell script that looks for soft87 project source -# tree (to be extracted within this source tree) -__autodetect_softx87: - ./autodetect_softx87.sh - -# run shell script to look for NASM -__autodetect_nasm: - ./autodetect_nasm.sh - -# create temporary empty versions of the -# include Makefiles that some rely on -# so they work. They will be deleted when -# "make clean" or "make distclean" is finished -__fake_makes: - if [[ !( -f samples/Makefile.nasm ) ]]; then echo "# nothing" >samples/Makefile.nasm; fi - if [[ !( -f softx86dbg/Makefile.softx86 ) ]]; then echo "# nothing" >softx86dbg/Makefile.softx86; fi - diff --git a/lib/3rdparty/softx86/autodetect_nasm.sh b/lib/3rdparty/softx86/autodetect_nasm.sh deleted file mode 100644 index 1a82fc9c1a4..00000000000 --- a/lib/3rdparty/softx86/autodetect_nasm.sh +++ /dev/null @@ -1,14 +0,0 @@ -# /bin/sh - -nasm >/dev/null - -if [[ "$?" == "0" || "$?" == "1" ]]; then - echo "all: samples_all" >samples/Makefile.nasm - echo "NASM=nasm" >>samples/Makefile.nasm -else - echo "#nothing to do here" >samples/Makefile.nasm - echo "all:" >>samples/Makefile.nasm - echo -n -e "\t" >>samples/Makefile.nasm - echo "echo You do not have NASM... skipping sample build" >>samples/Makefile.nasm -fi - diff --git a/lib/3rdparty/softx86/autodetect_softx87.sh b/lib/3rdparty/softx86/autodetect_softx87.sh deleted file mode 100644 index 7045056a1fc..00000000000 --- a/lib/3rdparty/softx86/autodetect_softx87.sh +++ /dev/null @@ -1,9 +0,0 @@ -# /bin/sh - -if [ -d ./softx87 ]; then - echo "INCLUDZ += -DSOFT87FPU" >softx86dbg/Makefile.softx87 - echo "LIBINCLUDZ += -lsoftx87" >>softx86dbg/Makefile.softx87 -else - echo "#nothing to do here" >softx86dbg/Makefile.softx87 -fi - diff --git a/lib/3rdparty/softx86/changes.txt b/lib/3rdparty/softx86/changes.txt deleted file mode 100644 index 95c2135e178..00000000000 --- a/lib/3rdparty/softx86/changes.txt +++ /dev/null @@ -1,355 +0,0 @@ -v0.00.0033: Jonathan Campbell - - Added helper function softx87_connect_to_CPU() - to ease CPU <=> FPU connection for programmers. - - Added softx86_set_intvect(). - - Added general API functions softx86_make_simple_near_call(), - softx86_make_simple_far_call(), softx86_make_simple_interrupt_call(), - to make it easier for the program to manually invoke - calls to program code within the virtual environment. - - Added FBLD and FBSTP emulation - - Added FLD1, FLDL2T and other constant-related FPU instruction emulation - - Added FCLEX & FSCALE emulation - - Added F2XM1 & FCOM emulation - - Added FDIV, FDIVR, and FICOM emulation - -v0.00.0032: Jonathan Campbell - - Using the 'u' command multiple times without - arguments now continues the decompiler from - where it left off, rather than restarting at - CS:IP - - Fixed a bug that caused Softx86dbg to crash if - run without an executable image to debug. - - Fixed a an error in the code that causes Softx86dbg - to crash when debugging a .COM file. See - http://sourceforge.net/tracker/index.php?func=detail&aid=919504&group_id=76259&atid=546548 - for details. - - Added code to stop emulation and alert the user - if the instruction pointer wanders into areas - that normally do not contain code (e.g. the - interrupt vector table, the BIOS data area, - adapter ROM areas, etc). - - Fixed up INT 21h AH=4Ch/AH=00h code that would - have otherwise failed if AL was anything but 00h. - - Cleaned up interrupt handler system in Softx86dbg. - -v0.00.0031: Jonathan Campbell - - Added command "!ramdump" to dump the entire 1MB - simulated RAM buffer to a file so you can then - examine it further with your favorite hex editor. - - Fixed coding mistake in .EXE relocation code that - caused corruption of the .EXE image, as well as - incorrect relocations - - Added check for .EXE files with funny entry point - values (e.g. 0xFFF0:0x0100) that ultimately translate - to valid offsets (such as the very beginning of the - resident area). Attempts to debug these previously - caused softx86dbg to crash. These EXEs were probably - converted from .COM images anyway. - - Fixed 'D' and 'U' command parsing bugs in softx86dbg - that failed to recognize first segment value - if it started with A-F (e.g. BF45:1233) - - Fixed incorrect assignment of DS and ES when - setting up .EXE emulated environment in - softx86dbg. DS and ES now point to PSP segment - instead of the first paragraph of the EXE - binary. - - Fixed bugs dealing with group 80h instructions - that are using an 8-bit sign-extended immediate - value with a 16-bit parameter. - - It turns out DOS DEBUG.EXE (at least the one - bundled with Windows XP) also supports multiple - steps with t followed by the number of steps. - The funny thing is that it assumes the number - is hexadecimal... whatever. - -v0.00.0030: Jonathan Campbell - - More FADD fixes - - Softx86dbg shows FPU contents in scientific notation - - Added FSUB, FSUBP emulation - - Added FABS, FCHS, FRNDINT - - Soft86 context structure modified so that the structure - itself stays the same size and format even if additions - are made to sub-structures - - Softx87 will no longer be distributed separately from - the main source tarball - - New documentation! - -v0.00.0029: Jonathan Campbell - - Fixes for FADD - - Integer -> float conversion now normalizes the values. - -v0.00.0028: Jonathan Campbell - - Added FADD, FADDP, FIADD 8087 instructions - -v0.00.0027: Jonathan Campbell - - Fixed LOCK decompiler not printing anything to the buffer. - - Enhanced FPU backend and started development on - Softx87, an 8087 FPU emulation engine designed to tie - into Softx86. - - Added FINIT, FNOP, FLD, FINCSTP, FDECSTP, FFREE - - install.sh is no longer regenerated - - More intelligent makefile now checks for presence of - NASM and softx87 source tree. If you didn't download - the softx87 code with softx86, softx86dbg is compiled - and built without 8087 emulation support. If you don't - have NASM the samples are not built and are skipped. - -v0.00.0026: Jonathan Campbell - - Added callback-based backend so that Softx86 can - hand FPU opcodes off to other libraries or subroutines - assigned to emulating the 80x87 FPU. If no callbacks - for this have been assigned Softx86 treats the opcode - as unknown. - - Added version information to the context structure. - - Fixed bug in softx86dbg's handling of the 'R' register - change command for the segment registers. - - Added callback for CPU resets. - -v0.00.0025: Jonathan Campbell - - Added group 3-1A (0xF6/0xF7 opcodes) TEST r/m, - NOT r/m, NEG r/m, MUL r/m, IMUL r/m, DIV r/m, IDIV r/m. - - Added LOOP/LOOPZ/LOOPNZ. - - Added ENTER/LEAVE. - - Added LES and LDS. - - Added BOUND. - - The entire 8086 instruction set is now implemented in - this library (at least the ones that Intel documents). - Let me know if I'm wrong. If this proves to be a sturdy - implementation I might re-release this as the official - v1.0 beta! Let me know if any undocumented instructions - should be implemented. - -v0.00.0024: Jonathan Campbell - - Added RCL and RCR - -v0.00.0023: Jonathan Campbell - - Added SHL, SHR, and SAR - - Added some helpful constants in softx86.h that can be used - in shifting operations to obtain specific bits in the FLAGS - register, like this: - - t = (ctx->stage.flags>>SX86_CPUFLAGBO_PARITY)&1; - - instead of: - - t = (ctx->stage.flags&SX86_CPUFLAG_PARITY)?1:0; - - - Added ROL, ROR - -v0.00.0022: Jonathan Campbell - - Added PUSHA, POPA, LOCK - -v0.00.0021: Jonathan Campbell - - Fixed major mistake in FAR CALL/INTERRUPT stack framing - code. Segment and offset values were pushed onto the - stack in the wrong order! - - Added CALL/JMP/CALL FAR/JMP FAR (0xFF /2 /3 /4 and /5) - - Added preliminary code to start supporting 80286 instructions. - softx86_init() now reports 8088/8086 emulation as stable, - since 80% of the instructions have been implemented anyway. - calling softx86_init() with SX86_CPULEVEL_80286 or - SX86_CPULEVEL_80186 is now legal. - - Fixed main Makefile. Somehow it got mixed up with another - Makefile. - -v0.00.0020: Jonathan Campbell - - Added FAQ. - - Fixed minor error in hypothetical I/O device at port 0x9A. - 16-bit data is now treated the same way that it would be if - written as 8-bit data. - - DOS 16-bit real-mode EXE loader. Now softx86dbg can debug - MS-DOS EXEs. - -v0.00.0019: Jonathan Campbell - - Added PUSHF/POPF. - - Added SAHF/LAHF---HA HA HA! LAHF! GET IT? :) - - Added CMPS and SCAS - - Updated instodo.txt to show some instructions that I forgot to - mention were implemented already. - - Fixed bug in REP loop code that continued looping even if - ZF flag failed condition. This caused many REPNE SCASB loops to - fail until it was fixed. - -v0.00.0018: Jonathan Campbell - - Fixed coding mistakes in segment prefix decoder (using >= not ==) - - Added REP/REPZ prefix handling - - Added MOVS, LODS, STOS - - README file rewritten - - Fixed SOFTX86DBG printing unshifted value ANDed from FLAGS for flag - states (e.g. should be ZF=1 not ZF=64). - - The 't' command under SOFTX86DBG now allows optional parameter to - specify how many instructions to step through before returning. For - example: - - t 27 - - means step through 27 instructions. - - Added the ability to compile Softx86 and Softx86dbg using MINGW and - Bloodshed Dev-C++ IDE. - -v0.00.0017: Jonathan Campbell - - Found a way to convince MSVC++ that Softx86 is a dependency of - Softx86dbg. Reorganized project files so that the static library - is a dependency of the DLL version, and the DLL version is a - dependency of Softx86dbg. The DLL version now exports symbols - from the compiled static library version instead of recompiling - the entire library to produce the DLL. - - Softx86dbg now has a pretty icon resource so you can easily - identify it under Windows :) - - Added JMP abs. direct far and CALL abs. direct far. - - Fixed FAR and INTERRUPT stack frame code that put segment and - offset values in the wrong order! - - Added JMP/CALL rel8/rel16. - -v0.00.0016: Jonathan Campbell - - Added TEST and XCHG. - - Added LEA (Load Effective Address) - - Added TEST08.ASM to test the TEST/XCHG instructions. - - Softx86dbg now shows CPU flags as CF=1, AF=0, etc. for clarity. - -v0.00.0015: Jonathan Campbell - - Added DAA, XLAT and DAS instructions. - - Fixed a few subtle bugs in AAA and AAS emulation where final result - was not masked with 0xF like it should have been. - - Fixed AAA/AAS/AAM/AAD instructions to properly set CPU flags like they - should. - -v0.00.0014: Jonathan Campbell - - Registers are now represented by a structure (a union really) - rather than 16-bit word values that are referred to directly with - Endian-sensitive code. I had never thought of using C/C++ unions - like this before... thanks goes to Paul Muller for bringing this - up. On the other hand... in the act of modifying all of the emulation - code to handle the new arrangement it's possible that I broke - something.... please let me know or fix it and e-mail the patch to - me. - - Added Jcc (JMP conditional) instructions (JCXZ,JA,JB,JL,JG,JP,JZ,JC...) - -v0.00.0013: Jonathan Campbell - - Added CMP and AND. - -v0.00.0012: Jonathan Campbell - - Added API call to "reset" the CPU. - - Added XOR. - - Added API call to get library version. This can be used when - linked to the shared library to determine the version and - whether or not it matches the #defines in softx86.h. - -v0.00.0011: Jonathan Campbell - - Fixed missing header file problems in MSVC++ project workspace - files caused by renaming config.h to softx86cfg.h. - - Fixed erroneous use of opcode functions where parameters were - switched from their intended meaning. In other words, the - executioneer functions were passing the destination as the - source and the source as the destination. This causes the - SUB and SBB instructions to add rather than subtract like - they should. - - Added SBB. - - Added INT 3, INT n, INTO. - - Added CPU interrupt handling (external and internal). - - Added bug emulation. - - Added host idle callback for finer emulation during the - execution of an instruction. - - Added CPU NMI code. - - Softx86dbg now allows you to change register values by - typing "r [regname]". - - Softx86dbg now has very primitive INT 20h and INT 21h - emulation. - - Added fix for COM loading code in softx86dbg that would - otherwise overrun the simulated RAM if the user were to - try to debug a very large file. - - More fixes; apparently whenever I transfer the tarball - back and forth between my Linux box and my Windows box - the install.sh script got munged with DOS \n\r sequences. - This apparently causes Bash to come up with really weird - error messages pointing to the functions and referring to - 'nstall.sh (wtf?!?). So from now on the Makefile automatically - generates install.sh when you type "make" for the first time - and removes install.sh file when you type "make distclean". - -v0.00.0010: Jonathan Campbell - - Added SUB and ADC. - - Added ADD r/m,imm. - - Make install improved, more intelligent, moved to install.sh - as a shell script that is called when you type "make install". - - Makefile script more intelligent, automatically creates "obj" - subdirectories now (and removes them on "make distclean"). - - Changed BYTE_ORDER #define in softx86.h so that it doesn't - conflict with headers in /usr/include. It is now called - SX86_BYTE_ORDER. - -v0.00.0009: Jonathan Campbell - - Added IN/OUT instruction emulation. - - Sample code to make use of IN/OUT and hypothetical - hardware adding logic with I/O ports that softx86dbg - provides for testing. - - Fixed erroneous AF (Aux flag) emulation for ADD. Found - out (and later found a reference to this in Intel's - 80286 documentation) that AF is set if the CPU, peforming - addition one 4-bit nibble at a time (a 16/32-bit - processor!?!) has to carry while adding the least - significant nibbles. For example: - 0x04 + 0x06 = 0x0A AF=0 - 0x08 + 0x08 = 0x10 AF=1 - 0x10 + 0xFF = 0x10F AF=0 - 0x1E + 0xFF = 0x11D AF=1 - -v0.00.0008: Jonathan Campbell - - Softx86 now compiles into a shared library for Linux and a - DLL for Win32. - -v0.00.0007: Jonathan Campbell - - More work on the mod/reg/rm decoder - - MOV [r/m],[segreg] and MOV AL/AX,[mem] implemented - - MOV [r/m],[imm] implemented - - More test assembly code - -v0.00.0006: Jonathan Campbell - - Apparently DOS DEBUG single-step command is 't', not 's'. - Sorry :) - - ADD mod/reg/rm and MOV mod/reg/rm implemented. - - ADD al,imm8 and ADD ax,imm16 implemented. - - Segment prefixes CS: DS: ES: and SS: now supported. - -v0.00.0005: Jonathan Campbell - - Installation of library and header files for Softx86 possible - via "make install" command (if you are root). - - Fixed some errors in README file, compiling instructions - clearer now. - -v0.00.0004: Jonathan Campbell - - Linux/GCC makefiles. - - Command line input written for Linux version. - - SoftX86 documentation reference and summary included in source - now. - - Library archive output of SoftX86 for Linux. - - More comments in softx86dbg to make it easier to understand. - -v0.00.0003: Jonathan Campbell - - More opcodes: RET n, RETF, RETF n, IRETD, HLT - - Removed alignment code, statements about 80x86 CPU always - accessing memory on aligned boundaries was wrong, based - on mis-interpretation of CPU diagrams. - - Instruction execution functions can now return value 3 - to indicate that the opcode was executed in full - completeness but that a looping operation is in effect and - that the instruction pointer should remain the same afterwards. - -v0.00.0002: Jonathan Campbell - - More one-byte opcodes added: CBW, CWDE, CWD, CDQ, CLC, - CLD, CLI, CMC, STC, STD, STI - - Made necessary additions to ? command in softx86dbg (now - it honestly tells you all commands supported). - - softx86dbg now heeds "warning" return value from libsoftx86 - and displays warning message. - -v0.00.0001: Jonathan Campbell - - Initial release - - One-byte opcodes added: AAA, AAS, PUSH [reg], POP [reg], - PUSH CS/DS/ES/SS, POP CS/DS/ES/SS, NOP - - Preliminary library interface design - - MSVC 6.0 project workspace files only---Linux Makefile - soon to come - - Program to test library with: softx86dbg - - Sample assembly code to test library with: - samples/test01.asm (NASM required to assemble) diff --git a/lib/3rdparty/softx86/doc/softx86.txt b/lib/3rdparty/softx86/doc/softx86.txt deleted file mode 100644 index e9542ee26c4..00000000000 --- a/lib/3rdparty/softx86/doc/softx86.txt +++ /dev/null @@ -1,546 +0,0 @@ - -Softx86 - Stock Software Intel 80x86 emulation library - -Introduction -============ - -Softx86 is designed to be a simple library that one can -link into their program for 80x86 emulation purposes. -The primary goals of this project are: - -* accurate emulation -* reasonably sized memory footprint -* modular design that closely models the actual - hardware signals (Clocking, I/O, addressable - memory, #INT and #NMI) using callbacks - set up by the program - -The Softx86 library itself is designed to emulate ONLY -the CPU, none of the surrounding hardware. Just like -the real thing the program using Softx86 is responsible -for providing RAM, I/O, and #INT/#NMI signals as -appropriate, and making the necessary calls to cycle the CPU. - - -+-----------------------------------------------+ -| SOFTX86 LIBRARY IN A TYPICAL EMULATOR PROJECT | -+-----------------------------------------------+ - - - +-----------------------------------+ - | APPLICATION AS THE "MOTHERBOARD", | - | "POWER SUPPLY", "RAM", AND "I/O | - | DEVICES". | +------------------------------+ - | | | SOFTX86 LIBRARY AS THE "CPU" | - | MAIN LOOP | | | - | | | | CPU INSTRUCTION EXECUTIONEER | - | +-----------------------------------------------------------^ | | - | | | | | - | ADDRESSABLE RAM EMULATION<=====================(callback)==============| | - | | | | | - | I/O PORT EMULATION<============================(callback)==============/ | - | | | | - | INTERRUPT SIGNAL SOURCE | | | - | \/ \/ | | | - | #INT LINE MODERATOR --------------------->| #NMI handler | - | \/ | | | - | ---------------------------------------->| #INT handler | - | | | | - +-----------------------------------+ +------------------------------+ - - Softx86 is like a lone CPU, it needs a "motherboard" to interact with. - - -The Softx86 API uses context structures to represent -a CPU, rather than internal variables, so that -it is possible to emulate more than one CPU -simultaneously using the same library. This also -puts the CPU's entire state in one location for both -Softx86 and the application using it, so that use -of numerous API calls are generally not needed to get -or set the CPU state (although some members should -not be modified directly). - -STEP 1: CREATING A CPU -====================== - -To create a CPU, you first need to allocate a region -of memory of size sizeof(softx86_ctx). - ------ C example ----- -softx86_ctx* cpu; -cpu = (softx86_ctx*)(malloc(sizeof(softx86_ctx))); - ------ C++ example ----- -softx86_ctx* cpu; -cpu = new softx86_ctx; - -Using memset() to fill the contents of that area with NULL -is advised but not absolutely necessary. - -Then call API function softx86_init(), passing it the address -of the context structure and a constant from softx86.h -that represents which version of the 80x86 the context -structure represents. - ------- C/C++ example ----- -/* I want this CPU to act like a 80286. */ -/* Act appropriately if there is an error. */ -ser=softx86_init(cpu,SX86_CPULEVEL_80286); -if (ser == 0) { - printf("ERROR: Unable to initialize CPU\n"); - return 0; -} - -STEP 2: SET UP CALLBACKS -======================== - -You've made the CPU but now it needs to know who to call -for fetching RAM and I/O. Set that up now. - -WARNING: This is grossly oversimplified, not including code - to properly handle requests that fall outside the - 1MB range! YES IT CAN HAPPEN, ESPECIALLY IF EMULATING - THE 286 WHICH CAN ADDRESS 16MB! See Softx86dbg source - code for a better example! - ------ C/C++ example ----- -/* can hold the entire 1MB range supported by the 8086 */ -unsigned char BIG_HUNK[1024*1024]; - -/* called when reading memory */ -void on_read_memory(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - memcpy(buf,BIG_HUNK+address,size); -} - -/* called when writing memory */ -void on_write_memory(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - memcpy(BIG_HUNK+address,buf,size); -} - -/* called when reading an I/O port */ -void on_read_io(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - /* in this example there are no I/O ports */ - memset(buf,0xFF,size); -} - -/* called when writing an I/O port */ -void on_write_io(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - /* in this example there are no I/O ports */ -} - -/* function to set up the callbacks for given cpu */ -void setup_callbacks(softx86_ctx *cpu) -{ - cpu.callbacks->on_read_memory = on_read_memory; - cpu.callbacks->on_write_memory = on_write_memory; - cpu.callbacks->on_read_io = on_read_io; - cpu.callbacks->on_write_io = on_write_io; -} - -Once everything is set up, you must call softx86_reset() -to reset the CPU. - ------ C/C++ example ----- -softx86_reset(cpu); - -STEP 3: GIVE THE CPU SOMETHING TO EXECUTE -========================================= - -For the CPU to execute something it must have valid instructions. -There are many sources that these can be obtained, starting with -simple MS-DOS .COM executables (which can be found on any web site -dedicated to ancient DOS programs and games), or perhaps whatever -happens to be on the hard drive of that old dusty 286 in the corner, -although you can also find some on many Windows 95/98-based systems. -By .COM executables I DO NOT MEAN COM/OLE ActiveX controls! -Anyway, best results can be obtained by using a COM program that is -simple (doesn't rely too much on direct hardware access or performs -a simple function). - -Loading a COM executable into your program's simulated RAM should be -easy: - ------ C/C++ example ----- -void load_code() -{ - FILE *comfile; - - comfile = fopen("whatever.com","rb"); - if (!comfile) { - printf("Unable to load program!\n"); - return 0; - } - - /* remember BIG_HUNK[] ? */ - /* 0x100 offset because of PSP segment and such */ - /* CS:IP = 0x1000:0x0100 */ - /* (0x1000 << 4) + 0x100 = 0x10100 */ - fread(BIG_HUNK+0x10100,65280,1,comfile); - fclose(comfile); - - /* set up a PSP and such... */ - /* I'll leave it up to you as an exercise :) */ - - /* done */ - return 1; -} - -Now that there is code to execute, we need to tell the CPU where -to start executing. To do this, we must redirect the INSTRUCTION -POINTER. - -NOTE: The instruction pointer variables can be accessed directly - through the context structure to obtain the values and - the cached information (such as precalculated segment->linear - conversion). HOWEVER you must not modify these values - directly! - ------ C/C++ example ----- -softx86_set_instruction_ptr(cpu,0x1000,0x100); - -Depending on the program, it is most likely that you will want -to set up the stack pointer as well so that the program has a -usable stack. - -NOTE: The stack pointer must NOT be modified directly, although - the values can be readily obtained through the context - structure! - ------ C/C++ example ----- -softx86_set_stack_ptr(cpu,0x1000,0xFFF8); - -Many DOS programs assume that DOS will set the segment registers -so that CS = DS = ES. Set the segment registers appropriately: - -NOTE: The segment registers carry with them a cached copy of - various state information (limits, precalculated - segment->linear conversion, protected mode bits, etc). - They may be directly accessed through the context - structure but must not be modified directly! - ------ C/C++ example ----- -softx86_setsegval(cpu,SX86_SREG_DS,0x1000); /* set DS */ -softx86_setsegval(cpu,SX86_SREG_ES,0x1000); /* set ES */ - -STEP 4: CYCLING THE CPU -======================= - -Execution doesn't happen unless your program explicitly wants -it to happen, which it does by calling softx86_step(). For -each call to softx86_step(), one instruction is executed -and then control is returned to your program. The return -value indicates success or failure. - ------ C/C++ example ----- -x=softx86_step(cpu); -if (x == 0) { - printf("The CPU failed to execute or recognize an instruction\n"); -} - -During the call, softx86_step() is likely to call your -memory and I/O callback routines (in fact it's guaranteed). -When softx86_step() returns the instruction pointer values -and all registers affected will be updated according to -whatever instruction was executed. On return, the instruction -pointer points to the next instruction that will be executed, -or points to the offending instruction if an error occured. - - -* FOR MORE DETAILS REFER TO THE SOFTX86DBG SOURCE CODE, OR - E-MAIL ME AT jcampbell@mdjk.com. - - -FREEING/DISPOSING OF A CPU -========================== - -Disposing of a CPU is simple. Call softx86_free() -and then free the memory you allocated for that -structure. That's it. - -NOTE: It is very important to call softx86_free() - because Softx86 itself allocates memory - for CPU emulation purposes associated with - that CPU. Freeing the structure and not - calling softx86_free() may (very likely!) - result in memory leaks! - ------ C example ----- -softx86_free(cpu); -free(cpu); - ------ C/C++ example ---- -softx86_free(cpu); -delete cpu; - - -HOW TO SIGNAL AN EXTERNAL HARDWARE INTERRUPT -============================================ - -Use API call softx86_ext_hw_signal() to emulate an #INT -signal from hardware. - -NOTE: Do not assume that this function will succeed. - If softx86_ext_hw_signal() has already been called - but the CPU has not yet acknowledged the interrupt, - softx86_ext_hw_signal() will return 0 (error). - Otherwise, it will return 1 (success). If you plan - on emulating a platform with multiple interrupt - signals possible, consider writing a wrapper for - this call in your program that moderates the - signals somehow. For example, write a portion of - your program that emulates the Programmable - Interrupt Controller in IBM PC/XT/AT+ hardware, then - write a general function your code can call that - emulates IRQ signals being sent to the PIC. The PIC - emulator can then act as a moderator that uses this - function to pass the IRQ signals to the CPU. - ------ C/C++ example, signalling INT 9 (PC/XT/AT+ IRQ 1) from hardware ----- -int i,j; - -/* loop until we can signal the interrupt we want */ -/* ---or, until CPU failure */ -i=1; -j=0; -while (i && !j) { - i=softx86_step(cpu); - if (i) j=softx86_ext_hw_signal(cpu,9); -} - -HOW TO SIGNAL AN EXTERNAL NMI (NON-MASKABLE) HARDWARE INTERRUPT -=============================================================== - -Use API call softx86_ext_hw_nmi_signal() to emulate an -#NMI signal from hardware. - -NOTE: Do not assume that this function will succeed. - If #NMI has already been activated but the CPU - has not yet acknowledged the interrupt, this - function will return 0 (error). Otherwise, it - will return 1 (success). - -NOTE: This signal is processed immediately, even if - #INT is active. #NMI has higher priority than - #INT. - ------ C/C++ example, signalling NMI from hardware ----- -int i,j; - -/* loop until we can signal the interrupt we want */ -/* ---or, until CPU failure */ -i=1; -j=0; -while (i && !j) { - i=softx86_step(cpu); - if (i) j=softx86_ext_hw_nmi_signal(cpu); -} - -HOW TO FORCE SOFTWARE INTERRUPT -=============================== - -calling softx86_int_sw_signal() causes the CPU to branch to -an interrupt as if the INT instruction had just been executed -in the program. - -NOTE: If the CPU is in protected mode, this function may fail - if the interrupt is invalid according to the IDT or - GDT/LDT! - ------ C/C++ example, software interrupt INT 21h ----- -softx86_int_sw_signal(cpu,0x21); - -HOW TO USE THE DECOMPILER -========================= - -In addition to providing the ability to execute instructions, -Softx86 provides an alternate API call to decompile instructions -at an alternate instruction pointer referred to as the -"decompiler instruction pointer". - -First, you set the decompiler IP using -softx86_set_instruction_dec_ptr() or -softx86_decompile_exec_cs_ip(). - -NOTE: The decompiler instruction pointer, like the - CPU instruction pointer, MUST NOT BE MODIFIED - DIRECTLY! - ------ C/C++ example, setting decompile CS:IP to specific values ----- -sx86_udword seg,ofs; -softx86_set_instruction_dec_ptr(cpu,seg,ofs); - ------ C/C++ example, setting decompiler CS:IP == current instruction pointer ----- -softx86_decompile_exec_cs_ip(cpu); - -Then, you call softx86_decompile() for each instruction, providing -for it a char array that is 256 bytes wide or larger. - ------ C/C++ example, decompiling 10 instructions following CS:IP ----- -char asmbuf[256]; -int j; - -softx86_decompile_exec_cs_ip(cpu); -for (j=0;j < 10;j++) { - if (!softx86_decompile(cpu,asmbuf)) { - printf("*decompiler error!\n"); - j=10; /* terminate the loop */ - } - else { - printf("%s\n",asmbuf); - } -} - -HOW TO DETERMINE THE SOFTX86 VERSION -==================================== - -Obtaining the version of the Softx86 library your -program is using is simple. Have 3 integers ready -and call softx86_getversion() like this: - -int x,major,minor,subminor; - -x=softx86_getversion(&major,&minor,&subminor); -if (!x) { - printf("Unable to obtain version!\n"); - return 1; -} - -You can then determine if you're using the version -you were compiled for by matching them against the -constants (defined in softx86.h) SOFTX86_VERSION_HI, -SOFTX86_VERSION_LO, and SOFTX86_VERSION_SUBLO. - -if (major != SOFTX86_VERSION_HI || - minor != SOFTX86_VERSION_LO || - subminor != SOFTX86_VERSION_SUBLO) { - printf("ERROR: Version mismatch!\n"); - return 1; -} - -HOW TO CHANGE THE GENERAL REGISTERS -=================================== - -All of the general registers (AX,BX,CX,DX,SI,DI,BP,SP) -are of type softx86_regval, which is a union that allows -either partial or complete access of the contents -(no matter what the native byte order is). - -The general registers reside in -cpu->state.general_reg[], an array of softx86_regval -values which may be indexed using the constants defined in -softx86.h: - -SX86_REG_AX,SX86_REG_BX,SX86_REG_CX,SX86_REG_DX, -SX86_REG_SI,SX86_REG_DI,SX86_REG_BP,SX86_REG_SP. - -NOTE: You must not modify the SP register directly! - Use softx86_set_stack_ptr() - -Thus, you can read/modify AX like this: - -cpu->state.general_reg[SX86_REG_AX].w.lo - -or EAX like this: - -cpu->state.general_reg[SX86_REG_AX].val - -or AH like this: - -cpu->state.general_reg[SX86_REG_AX].b.hi - -*------------------------------------* -| softx86_regval union naming scheme | -*------------------------------------* -general_reg[idx].val = the entire 32 bit register (e.g. EAX) -general_reg[idx].w.lo = the lower 16 bit portion (e.g. AX bits 0-15) -general_reg[idx].w.hi = the upper 16 bit portion (bits 16-31) -general_reg[idx].b.lo = the lower 8 bit portion (e.g. AL bits 0-7) -general_reg[idx].b.hi = the upper 8 bit portion (e.g. AH bits 8-15) -general_reg[idx].b.extra[0] = bits 16-23 as a byte -general_reg[idx].b.extra[1] = bits 24-31 as a byte - -HOW TO CHANGE THE INSTRUCTION POINTER -===================================== - -The instruction pointer lies in cpu->state.reg_ip (IP) -and cpu->state.segment_reg[SX86_SREG_CS].val (CS). - -NOTE: You should NOT change this value directly! Use - softx86_set_instruction_ptr() or - softx86_set_near_instruction_ptr() instead! - Changing reg_ip directly may cause problems - with instruction prefetch emulation or - any portion of the code that caches the - instruction pointer. - -cpu->state.reg_ip is a DWORD value that represents the -current offset in the code segment. -cpu->state.segment_reg[SX86_SREG_CS].val represents the -actual value of the CS segment register, along with the -precalculated linear and limit values for the segment/selector. - -To change both CS and IP to known values, call -softx86_set_instruction_ptr() with the new CS:IP values. - -NOTE: softx86_set_instruction_ptr() and - softx86_set_near_instruction_ptr() will return - 0 (error) if the CS:IP values are invalid. - ------ C/C++ example ----- -x=softx86_set_instruction_ptr(cpu,0xF000,0xFFF0); -if (!x) { - printf("Failed to set instruction pointer!\n"); - return 1; -} - -If you only wish to change IP without changing CS, -you may call softx86_set_near_instruction_ptr(). - ------ C/C++ example ----- -x=softx86_set_near_instruction_ptr(cpu,0x100); -if (!x) { - printf("Failed to set instruction pointer!\n"); - return 1; -} - -HOW TO CHANGE THE SEGMENT REGISTERS -=================================== - -The segment registers are stored in the context structure -under cpu->state.segment_reg[] and are of type -softx86_segregval. softx86_segregval is a special structure -that holds the value of the register as well as hidden -cached values related to the segment register. - -typedef struct { - sx86_uword val; /* visible to program---the value */ - sx86_udword cached_linear; /* hidden---linear address of segment */ - sx86_udword cached_limit; /* hidden---limit of segment */ -} softx86_segregval; - -A particular segment value may be obtained by using -constants SX86_SREG_ES, SX86_SREG_CS, SX86_SREG_DS, -SX86_SREG_SS as indices to the array. - -NOTE: Do NOT modify these values directly. Use - softx86_setsegval() instead! - -To retrieve the current value in CS for example: - -segment = cpu->state.segment_reg[SX86_SREG_CS].val; - -To set the value of CS: - -x=softx86_setsegval(cpu,SX86_SREG_CS,0xF000); -if (!x) { - printf("Unable to set CS!\n"); - return 1; -} - -NOTE: softx86_setsegval() will return 0 (error) - if the CS value is invalid. diff --git a/lib/3rdparty/softx86/faq.txt b/lib/3rdparty/softx86/faq.txt deleted file mode 100644 index 51792d75b62..00000000000 --- a/lib/3rdparty/softx86/faq.txt +++ /dev/null @@ -1,237 +0,0 @@ -Frequently Asked Questions v0.00.0033 - -Q. When will Softx86 become a full-fledged PC emulator? - -A. It won't. It will however become a full-fledged Intel 80x86 CPU - clone that you can tie into your PC emulation software. - -Q. Where are the sample DOS binaries used to test the emulator? - -A. Prebuilt binaries are now distributed separately from the - source tarball. The source code is still provided, so you - can assemble them yourself if you have NASM (Netwide Assembler) - installed on your system. - -Q. How do I use softx86dbg? - -A. Bring up the command prompt (Windows or Linux), change to the - root directory of the source tree and type "bin/softx86dbg" - followed by a path to a DOS .COM executable. - - For example, to run samples/test11.com in the emulator, type: - - bin/softx86dbg samples/test11.com - - Linux users may benefit from running the statically linked - version (especially if they cannot "su root" and "make install") - because a previous version of the library installed in - /usr/local/lib might be incompatible with the latest version - of softx86dbg. You can run the statically linked version by - typing: - - bin/softx86dbg-static samples/test11.com - - softx86dbg will let you know if it couldn't load the file. - -Q. Softx86dbg is running and it found the COM file I want - to run. Now what? - - Softx86dbg more or less follows the DOS DEBUG.COM style - interface. For each step, the values of the registers - are shown. Commands are parsed one line at a time and - each command is entered as one or more letters. The - commands are: - - r [REGISTER] Change a register value - - r Show the register contents - - t Single-step (execute one instruction) - - q Quit - - d [[seg:]offset] Dump memory at given address. If no - address is given, ds:0x0000 is assumed. - If no segment value is given, the offset - is assumed to be within the current - data (DS) segment. - - u [[seg:]offset] Unassemble (disassemble) instructions - at given address. If no address is given, - disassembly starts at the current location - of the instruction pointer (CS:IP). If - no segment value is given, the offset is - assumed to be within the current code - (CS) segment. - - ? print help. - - Softx86dbg also recognizes commands that the original DOS DEBUG.COM - never had: - - t [x] Single-step times. In other words, - execute instructions then return. - UPDATE: It turns out DEBUG.COM for Windows - XP has this feature after all - - !reset Resets the virtual CPU. - - !ramdump Dumps the virtual RAM to a file named - 1MB_MEM.BIN - -Q. What kind of environment does Softx86dbg emulate? - -A. Softx86dbg emulates a very simple DOS-style environment. An INT 21h - interface is provided for the program to terminate by, and A simple - PSP structure is built for the program. Softx86dbg also demonstrates - the I/O port callback functions by emulating hypothetical hardware - that takes input and performs a simple calculation with it. - - When the program terminates through INT 21h, softx86dbg prints a - notice on the screen indicating that the program terminated. - -Q. How do I talk to the hypothetical hardware? - -A. Currently (as of v0.00.0020) there are two I/O ports that the - hardware exists on. - - Port 0x1234 is a simple register. Every time it is read, the value - is incremented by 0x22 or 0x2222 (depending on how much is read) - and then returned to the CPU. When written, the value is copied - verbatim to the register. - - Port 0x9A is a byte-sized register. When written, the value is - incremented by 1 and then stored in the register. Then read, - the value of the register is returned as-is. - - Since this can change in the future (not to mention conflicts with - actual PC hardware) do not rely on these I/O ports being emulated. - They are used only by samples/test04.com to test the I/O port - emulation of Softx86. - -Q. I wrote a program that uses Softx86. How do I make it execute - instructions? Is there a call that starts a background thread? - -A. Softx86 does not execute or decompile anything by itself. It expects - your program to execute instructions one at a time using - softx86_step(). - -Q. What is this "context structure" that every API function requires? - -A. The context structure represents one CPU and it's current state. - All registers, modes, caches, and such are stored in that state. - The design favors this over the use of static variables so that - one copy of libsoftx86 can potentially emulate several CPUs at - once. - - To "create" a CPU, allocate memory in your program for one - context structure and call softx86_init(). - -/* example of C code creating and initializing softx86 context structure */ - softx86_ctx* cpu; - - cpu = (softx86_ctx*)malloc(sizeof(softx86_ctx)); - memset(cpu,0,sizeof(softx86_ctx)); /* recommended, not strictly necessary */ - softx86_init(cpu); - -/* example of C++ code creating and initializing softx86 context structure */ - softx86_ctx* cpu; - - cpu = new softx86_ctx; - memset(cpu,0,sizeof(softx86_ctx)); /* recommended, not strictly necessary */ - softx86_init(cpu); - -/* example of C++ code pushing softx86 to the extreme by creating 32 separate CPUs */ - softx86_ctx* cpu; - int x; - - cpu = new softx86_ctx[32]; - memset(cpu,0,sizeof(softx86_ctx)*32); /* recommended, not strictly necessary */ - for (x=0;x < 32;x++) /* 32 brains are better than one! */ - softx86_init(&cpu[x]); - - The Softx86 API functions require this context structure so - that they know what CPU to perform the operation on and so that - they have access to the CPU state. To execute an instruction - on cpu0 and decompile something on cpu1, for example, you would - write: - - char cpu1_output[256]; - softx86_step(&cpu0); - softx86_decompile(&cpu1,cpu1_output); - - To delete a CPU and free the resources associated with it - (including caches stored in the context structure), pass - the context structure one last time to soft86_free(). - Once it has been freed by softx86_free() you may free - the memory used by the context structure itself (or - do whatever you want to it). - -/* example of C code freeing a CPU */ - softx86_free(cpu); - free(cpu); - cpu=NULL; - -/* example of C++ code freeing a CPU */ - softx86_free(cpu); - delete cpu; - cpu=NULL; - -/* example of hot-shot C++ code (above) freeing all 32 CPUs he created */ - int x; - - for (x=0;x < 32;x++) - softx86_free(&cpu[x]); - - delete cpu; - cpu=NULL; - -/* example of C code creating, freeing a CPU, then dancing on it's grave */ - char *ptr; - softx86_ctx* cpu; - - ptr = malloc(sizeof(softx86_ctx)); - cpu = (softx86_ctx*)ptr; - softx86_init(cpu); /* create CPU */ - softx86_step(cpu); /* execute something */ - softx86_free(cpu); /* you've served your purpose now get outta here! */ - strcpy(ptr, /* alright yeah! Now I can safely use the same area of memory */ - "Blah Blah Yadda Yadda"); /* to store funny weird ASCIIZ strings! Whoo! */ - free(ptr); /* but I have better things to do... */ - -Q. I get strange errors from make or Bash even though the scripts and Makefiles - look perfectly fine. - -A. The install.sh script may have gotten munged with DOS-style CR LF line breaks. - This seems to happen when I pack the source code into a .tar.gz tarball then - copy the tarball to my Windows machine and unpack it using WinZIP or 7-Zip. - It doesn't immediately seem broken because Notepad and Wordpad show it perfectly, - but when the extracted files are tar and gzip'd and moved back to the Linux box - to be tested, the problems show up almost immediately. Bash expects to see - only LF line breaks, which is why it panics the way it does. GNU Make as far - as I know is generally tolerant of DOS CR/LF sequences so perhaps the - Makefile is corrupt in some way. - - A quick fix can be done by changing to the directory containing Makefile and - install.sh and typing: - - dos2unix install.sh; dos2unix Makefile - - Bash shouldn't have any more problems. - NOTE: I've also found that WinZIP can't extract tar files properly if they - contain symlinks. 7-Zip does just fine. - -Q. There are all these makefiles to make a static library and a DLL. There are - also two makefiles to produce the same program: Softx86dbg. What's the point? - why are you doing this? - -A. Producing Softx86 as a static library AND a DLL allows software developers to - incorporate it into their programs in whatever flavor they like. Some people - especially those producting standalone programs, like statically linked - versions so that they don't have to deal with messy DLL dependencies or carry - extra luggage around with the main executable. Other developers, especially - those working on large projects, like modular designs so that DLLs and - resources can be loaded and unloaded dynamically (imagine a large project - that uses Softx86 as one of many emulation engines to simulate everything - ranging from a PC to a Z-80 to a Super-NES, for example). For these large - projects, Softx86 in DLL form is the best choice. diff --git a/lib/3rdparty/softx86/install.sh b/lib/3rdparty/softx86/install.sh deleted file mode 100644 index 217f47521c7..00000000000 --- a/lib/3rdparty/softx86/install.sh +++ /dev/null @@ -1,76 +0,0 @@ -# bin/bash -#--------------------------- -# install script for Softx86 -# (C) 2003 Jonathan Campbell -# -#--------------------------- -# this script automatically generated - -exit_if_failed() { - if [[ !( $? -eq 0 ) ]]; then exit 1; fi - return 0; -} - -installcopy2() { - echo "Installing Softx86 libraries+headers" - exit_if_failed - cp lib/libsoftx86.a /usr/lib/libsoftx86.a - exit_if_failed - cp lib/libsoftx86.so /usr/lib/libsoftx86.so - exit_if_failed - cp include/softx86.h /usr/include/softx86.h - exit_if_failed - cp include/softx86cfg.h /usr/include/softx86cfg.h - exit_if_failed - chmod 644 /usr/lib/libsoftx86.a - exit_if_failed - chmod 644 /usr/lib/libsoftx86.so - exit 0; -} - -install87copy2() { - echo "Installing Softx87 libraries+headers" - exit_if_failed - cp lib/libsoftx87.a /usr/lib/libsoftx87.a - exit_if_failed - cp lib/libsoftx87.so /usr/lib/libsoftx87.so - exit_if_failed - cp include/softx87.h /usr/include/softx87.h - exit_if_failed - chmod 644 /usr/lib/libsoftx87.a - exit_if_failed - chmod 644 /usr/lib/libsoftx87.so - exit 0; -} - -installcopy() { - if (installcopy2); - then echo "Installation done"; - else echo "Installation failed"; - fi - - return 0; -} - -install87copy() { - if (install87copy2); - then echo "Installation done"; - else echo "Installation failed"; - fi -} - -if [[ -f lib/libsoftx86.a && -f lib/libsoftx86.so ]]; -then installcopy; -else echo "You must build this project first"; -exit 0; -fi - -if [ -d softx87 ]; then - if [[ -f lib/libsoftx87.a && -f lib/libsoftx87.so ]]; - then install87copy; - else echo "You must build softx87 first"; - exit 0; - fi -fi - -#end diff --git a/lib/3rdparty/softx86/instodo.txt b/lib/3rdparty/softx86/instodo.txt deleted file mode 100644 index 78cc7731be1..00000000000 --- a/lib/3rdparty/softx86/instodo.txt +++ /dev/null @@ -1,230 +0,0 @@ - -A complete log of which instructions have been implemented so far: - -KEY: X = execution implemented - D = decompiler implemented - B = has known bugs - I = incomplete preliminary - ? = bug-free status not confirmed - - = not implemented - N = not handled if emulating that particular CPU - - INS OPCODE CONTRIBUTED TO BY 8086 8088 186 286 386 486 -==============|=============|======================|====|====|===|===|===|===| -ADD |0x00-0x03 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ADD |0x04-0x05 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSH ES |0x06 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -POP ES |0x07 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -OR |0x08-0x0B |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -OR |0x0C-0x0D |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSH CS |0x0E |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -POP CS |0x0F |jcampbell@mdjk.com |XD? |XD? |N |N |N |N | -SMSW /4 |0x0F 0x01 /4 |jcampbell@mdjk.com |N |N |XD?|XD?|XD?|XD?| -LMSW /6 |0x0F 0x01 /6 |jcampbell@mdjk.com |N |N |XD?|XD?|XD?|XD?| -ADC |0x10-0x13 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ADC |0x14-0x15 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSH SS |0x16 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -POP SS |0x17 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SBB |0x18-0x1B |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SBB |0x1C-0x1D |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSH DS |0x1E |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -POP DS |0x1F |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -AND |0x20-0x23 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -AND |0x24-0x25 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ES: |0x26 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -DAA |0x27 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SUB |0x28-0x2B |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SUB |0x2C-0x2D |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CS: |0x2E |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -DAS |0x2F |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -XOR |0x30-0x33 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -XOR |0x34-0x35 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SS: |0x36 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -AAA |0x37 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CMP |0x38-0x3B |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CMP |0x3C-0x3D |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -DS: |0x3E |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -AAS |0x3F |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -INC [reg] |0x40-0x47 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -DEC [reg] |0x48-0x4F |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSH [reg] |0x50-0x57 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -POP [reg] |0x58-0x5F |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSHA |0x60 |jcampbell@mdjk.com |N |XD? |XD?|XD?|XD?|XD?| -POPA |0x61 |jcampbell@mdjk.com |N |XD? |XD?|XD?|XD?|XD?| -BOUND reg,rm |0x62 |jcampbell@mdjk.com |N |XD? |XD?|XD?|XD?|XD?| -J [near] |0x70-0x7F |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ADD rm,imm /0 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -OR rm,imm /1 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ADC rm,imm /2 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SBB rm,imm /3 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -AND rm,imm /4 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SUB rm,imm /5 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -XOR rm,imm /6 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CMP rm,imm /7 |0x80-0x83 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -TEST reg,r/m |0x84-0x85 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -XCHG reg,r/m |0x86-0x87 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOV |0x88-0x8B |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOV [sreg] |0x8C |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LEA reg,r/m |0x8D |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOV [sreg] |0x8E |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -POP mem rm /6 |0x8F /6 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -NOP/XCHG AX,AX|0x90 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -XCHG reg16,AX |0x91-0x97 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -CBW |0x98 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -CWD |0x99 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -CALL seg:ofs |0x9A |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -WAIT |0x9B |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -PUSHF |0x9C |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -POPF |0x9D |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -SAHF |0x9E |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -LAHF |0x9F |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -MOV |0xA0-0xA3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOVS |0xA4-0xA5 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CMPS |0xA6-0xA7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -TEST |0xA8-0xA9 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -STOS |0xAA-0xAB |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LODS |0xAC-0xAD |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SCAS |0xAE-0xAF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOV |0xB0-0xB7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOV |0xB8-0xBF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ROL rm,imm /0 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ROR rm,imm /1 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RCL rm,imm /2 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RCR rm,imm /3 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SHL rm,imm /4 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SHR rm,imm /5 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SAR rm,imm /7 |0xC0-0xC1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RET + POP n |0xC2 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RET (near) |0xC3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LES reg,rm |0xC4 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LDS reg,rm |0xC5 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MOV |0xC6-0xC7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ENTER imm,imm |0xC8 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LEAVE |0xC9 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RETF + POP n |0xCA |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RETF (far) |0xCB |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -INT 3h |0xCC |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -INT n |0xCD |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -INTO |0xCE |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -IRET |0xCF |jcampbell@mdjk.com |XD? |XD |XD |XD |XD |XD | -ROL rm,1 /0 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ROR rm,1 /1 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RCL rm,1 /2 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RCR rm,1 /3 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SHL rm,1 /4 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SHR rm,1 /5 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SAR rm,1 /7 |0xD0-0xD1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ROL rm,CL /0 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -ROR rm,CL /1 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RCL rm,CL /2 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -RCR rm,CL /3 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SHL rm,CL /4 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SHR rm,CL /5 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -SAR rm,CL /7 |0xD2-0xD3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -AAM |0xD4 |jcampbell@mdjk.com |XD? |XD |XD |XD |XD |XD | -AAD |0xD5 |jcampbell@mdjk.com |XD? |XD |XD |XD |XD |XD | -XLAT |0xD7 |jcampbell@mdjk.com |XD? |XD |XD |XD |XD |XD | -[FPU backend] |0xD8-0xDF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LOOPNZ |0xE0 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LOOPZ |0xE1 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -LOOP |0xE2 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -JCXZ |0xE3 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -IN AL,imm |0xE4 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -IN AX,imm |0xE5 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -OUT AL,imm |0xE6 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -OUT AX,imm |0xE7 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -CALL rel16 |0xE8 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -JMP rel16 |0xE9 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -JMP seg:ofs |0xEA |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -JMP rel8 |0xEB |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -IN AL,DX |0xEC |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -IN AX,DX |0xED |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -OUT AL,DX |0xEE |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -OUT AX,DX |0xEF |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -LOCK |0xF0 |jcampbell@mdjk.com |XDI |XDI |XDI|XDI|XDI|XDI| -REPNZ |0xF2 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -REPZ |0xF3 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -HLT |0xF4 |jcampbell@mdjk.com |XDI |XDI |XDI|XDI|XDI|XDI| -CMC |0xF5 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -TEST rm,imm /0|0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -NOT rm /2 |0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -NEG rm /3 |0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -MUL rm /4 |0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -IMUL rm /5 |0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -DIV rm /6 |0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -IDIV rm /7 |0xF6-0xF7 |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CLC |0xF8 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -STC |0xF9 |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -CLI |0xFA |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -STI |0xFB |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -CLD |0xFC |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -STD |0xFD |jcampbell@mdjk.com |XD |XD |XD |XD |XD |XD | -INC rm /0 |0xFE-0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -DEC rm /1 |0xFE-0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CALL rm /2 |0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -JMP rm /3 |0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -CALL FAR rm /4|0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -JMP FAR rm /5 |0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| -PUSH mem rm /6|0xFF |jcampbell@mdjk.com |XD? |XD? |XD?|XD?|XD?|XD?| - -FPU INSTRUCTIONS - - INS OPCODE CONTRIBUTED TO BY 8087 287 387 487 -==============|===============|======================|====|===|===|===| -FADD mem32 |0xD8 /0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCOM mem32 |0xD8 /2 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCOMP mem32 |0xD8 /3 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FSUB mem32 |0xD8 /4 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIV mem32 |0xD8 /6 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIVR mem32 |0xD8 /7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FADD (0),(i) |0xD8 0xC0-0xC7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FSUB (0),(i) |0xD8 0xE0-0xE7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIV (0),(i) |0xD8 0xF0-0xF7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIVR (0),(i) |0xD8 0xF8-0xFF |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLD mem32 |0xD9 /0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLD ST(i) |0xD9 0xC0-0xC7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FNOP |0xD9 0xD0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCHS |0xD9 0xE0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FABS |0xD9 0xE1 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLD1 |0xD9 0xE8 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLDL2T |0xD9 0xE9 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLDL2E |0xD9 0xEA |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLDPI |0xD9 0xEB |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLDLG2 |0xD9 0xEC |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLDLN2 |0xD9 0xED |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLDZ |0xD9 0xEE |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -F2XM1 |0xD9 0xF0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDECSTP |0xD9 0xF6 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FINCSTP |0xD9 0xF7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FRNDINT |0xD9 0xFC |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FSCALE |0xD9 0xFD |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FIADD mem32 |0xDA /0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FICOM mem32 |0xDA /2 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FICOMP mem32 |0xDA /3 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FISUB mem32 |0xDA /4 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FIDIV mem32 |0xDA /6 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FIDIVR mem32 |0xDA /7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCLEX |0xDB 0xE2 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FINIT |0xDB 0xE3 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FADD mem64 |0xDC /0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCOM mem64 |0xDC /2 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCOMP mem64 |0xDC /3 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FSUB mem64 |0xDC /4 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIV mem64 |0xDC /6 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIVR mem64 |0xDC /7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FADD (i),(0) |0xDC 0xC0-0xC7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIVR (i),(0) |0xDC 0xF0-0xF7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIV (i),(0) |0xDC 0xF8-0xFF |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FLD ST(i) |0xDD /0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FFREE ST(i) |0xDD 0xC0-0xC7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FIADD mem16 |0xDE /0 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FICOM mem16 |0xDE /2 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FICOMP mem16 |0xDE /3 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FIDIV mem16 |0xDE /6 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FIDIVR mem16 |0xDE /7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FADDP (i),(0) |0xDE 0xC0-0xC7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FCOMPP |0xDE 0xD9 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FSUBP (i),(0) |0xDE 0xE8-0xEF |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIVRP (i),(0)|0xDE 0xF0-0xF7 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FDIVP (i),(0) |0xDE 0xF8-0xFF |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| -FBLD mem80 |0xDF /4 |jcampbell@mdjk.com |XD? |XD?|XD?|XD?| diff --git a/lib/3rdparty/softx86/license.txt b/lib/3rdparty/softx86/license.txt deleted file mode 100644 index 5b6e7c66c27..00000000000 --- a/lib/3rdparty/softx86/license.txt +++ /dev/null @@ -1,340 +0,0 @@ - GNU GENERAL PUBLIC LICENSE - Version 2, June 1991 - - Copyright (C) 1989, 1991 Free Software Foundation, Inc. - 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - Everyone is permitted to copy and distribute verbatim copies - of this license document, but changing it is not allowed. - - Preamble - - The licenses for most software are designed to take away your -freedom to share and change it. By contrast, the GNU General Public -License is intended to guarantee your freedom to share and change free -software--to make sure the software is free for all its users. This -General Public License applies to most of the Free Software -Foundation's software and to any other program whose authors commit to -using it. (Some other Free Software Foundation software is covered by -the GNU Library General Public License instead.) You can apply it to -your programs, too. - - When we speak of free software, we are referring to freedom, not -price. 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To prevent this, we have made it clear that any -patent must be licensed for everyone's free use or not licensed at all. - - The precise terms and conditions for copying, distribution and -modification follow. - - GNU GENERAL PUBLIC LICENSE - TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION AND MODIFICATION - - 0. This License applies to any program or other work which contains -a notice placed by the copyright holder saying it may be distributed -under the terms of this General Public License. The "Program", below, -refers to any such program or work, and a "work based on the Program" -means either the Program or any derivative work under copyright law: -that is to say, a work containing the Program or a portion of it, -either verbatim or with modifications and/or translated into another -language. (Hereinafter, translation is included without limitation in -the term "modification".) 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You may copy and distribute verbatim copies of the Program's -source code as you receive it, in any medium, provided that you -conspicuously and appropriately publish on each copy an appropriate -copyright notice and disclaimer of warranty; keep intact all the -notices that refer to this License and to the absence of any warranty; -and give any other recipients of the Program a copy of this License -along with the Program. - -You may charge a fee for the physical act of transferring a copy, and -you may at your option offer warranty protection in exchange for a fee. - - 2. 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See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - - -Also add information on how to contact you by electronic and paper mail. - -If the program is interactive, make it output a short notice like this -when it starts in an interactive mode: - - Gnomovision version 69, Copyright (C) year name of author - Gnomovision comes with ABSOLUTELY NO WARRANTY; for details type `show w'. - This is free software, and you are welcome to redistribute it - under certain conditions; type `show c' for details. - -The hypothetical commands `show w' and `show c' should show the appropriate -parts of the General Public License. Of course, the commands you use may -be called something other than `show w' and `show c'; they could even be -mouse-clicks or menu items--whatever suits your program. - -You should also get your employer (if you work as a programmer) or your -school, if any, to sign a "copyright disclaimer" for the program, if -necessary. Here is a sample; alter the names: - - Yoyodyne, Inc., hereby disclaims all copyright interest in the program - `Gnomovision' (which makes passes at compilers) written by James Hacker. - - , 1 April 1989 - Ty Coon, President of Vice - -This General Public License does not permit incorporating your program into -proprietary programs. If your program is a subroutine library, you may -consider it more useful to permit linking proprietary applications with the -library. If this is what you want to do, use the GNU Library General -Public License instead of this License. diff --git a/lib/3rdparty/softx86/readme.txt b/lib/3rdparty/softx86/readme.txt deleted file mode 100644 index 6bf17c0126e..00000000000 --- a/lib/3rdparty/softx86/readme.txt +++ /dev/null @@ -1,198 +0,0 @@ -Softx86: Software x86 CPU emulator library v0.00.0032 - -UNPACKING THE SOURCE TARBALLS -============================= - -Softx86 is distributed as several tarballs. The base tarball, -softx86-vx.xx.xxxx, contains the source code for softx86 -itself. No prebuild binaries are provided. The other source -tarballs are meant to be obtained and then extracted in the -same directory that you extracted softx86 itself. - -The additional tarballs contain: -- The sample binaries, already assembled -- Prebuilt Win32 versions of the libraries - and softx86dbg in DLL and static form. - -The Softx86 make system automatically detects the -presence of the softx87 directory (which exists -only if you extracted the softx87 tarball correctly). -If it is found, makefiles are modified so that -softx86dbg is built and compiled to use it. - -as of v0.00.0030 the softx87 source tree is now -distributed with softx86. - -EXAMPLE OF UNPACKING THE ENTIRE SOFTX86 PROJECT: - -cd /usr/src -tar -xzf softx86-v0.00.0032 -cd softx86 -make -make install - -PLATFORMS SUPPORTED -=================== - -Softx86 is carefully written and maintained so that the same source -tree can be used to produce Win32 and Linux binaries as well as -Win32 DLLs and Linux shared libraries. Compiler-specific optimizations -are welcome though they will be separated with #ifdef...#else...#endif -statements and macros for full portability. Optimizations and code -organization sensitive to various characteristics of the platform can -be controlled via #defines in include/config.h. - -COMPILING FOR WIN32 -=================== - -To compile the Win32 versions you will need Microsoft Visual C++ 32-bit -for Visual Studio 6.0 or higher. Service pack 5 and the latest processor pack -are recommended but not required. - -From Visual Studio, select "open workspace" and open softx86.dsw. Select -"softx86 - release", then hilight both projects in the workspace window. -Right click and select "build selection only" from the popup menu. - -This should make the following files: - -bin/softx86dbg.exe Win32 console application (NOT DOS!) not unlike - DOS DEBUG to test softx86. - -lib/softx86.lib Static library of softx86. - -WARNING: The interfaces and structures can and will change! If you distribute - a binary version of your program that uses Softx86, later versions - may break your program! This is alpha software, the context structure - has not been finalized! - -To recompile the test COM programs, you will need the Win32 or DOS version of -NASM installed somewhere referred to in your PATH= variable or in the same -directory. - -COMPILING FOR LINUX -=================== - -To compile for Linux you will need GCC 3.2.xx or higher, NASM 0.98 or higher, -make 3.79 or higher, and GNU ld 2.13 or higher. - -If you extracted the source tarball over the source of older versions please -type "make distclean" to clean up the source tree. - -Type "make" to compile the entire project. -This will make the following files: - -bin/softx86dbg console application not unlike DOS DEBUG to test - softx86. - -bin/softx86dbg-static statically linked version of softx86dbg. - -lib/libsoftx86.a Static library of softx86. - -lib/libsoftx86.so Shared library of softx86. - -Then, super-user to or logon as "root" and type "make install". This -will run a bash shell script that copies libsoftx86.a and libsoftx86.so -to your /usr/lib directory. This script will also copy softx86.h and -softx86cfg.h to your /usr/include directory. If any errors occur during -the installation process the script will immediately exit with a message. - -WARNING: The interfaces and structures can and will change! If you distribute - a binary version of your program that uses Softx86, later versions - may break your program! This is alpha software, the context structure - has not been finalized! - -USING SOFTX86DBG -================ - -Softx86dbg is a DOS DEBUG-style debugger that uses Softx86. It allows -very simple debugging of COM executable binary images written for DOS. -It does *NOT* emulate directly from an assembly language listing! - -Softx86dbg does not load a COM image by default. You must specify one -on the command line. - -DESIGN GOALS -============ - -The goal of Softx86 is to eventually become a full functioning software -clone of the Intel 80x86 CPU. I want to stress, however, that this library is -intended to become exactly that and no more. The interface between this -library and the host application is designed so that this library is only -responsible for fetching data and executing/decompiling instructions; the host -application is responsible for emulating other aspects of the PC platform -hardware (i.e. system timer or keyboard controller) and providing the -simulated memory for the CPU to fetch data from or write data to, thus -this library can be used to emulate ANY platform or environment involving -some use of the x86. - -WHY NOT C++ -=========== - -I am writing the majority of this library in C (even though the softx86dbg -program is in fact written in C++) so that it can be linked to either C or -C++ programs (whatever your preference). Writing this library in C++ in -contrast would render it unusable for C programs or require the use of -"wrappers". - -HOW DOES THE LIBRARY INTERACT WITH THE HOST APPLICATION? -======================================================== - -The host application allocates memory for a "context structure" that -represents one CPU (of type struct softx86_ctx). The host app then calls -softx86_init() to initialize the memebrs of that structure, given a value -specifying which revision of the 80x86 to emulate. Once done, the host app -can use other library API functions like softx86_set_instruction_ptr() to -set the instruction pointer, register values, etc. - -The library CPU does not automatically start executing instructions on -it's own. It only executes instructions when the host app tells it to by -repeatedly calling softx86_step() per instruction. Thus, how fast the -software CPU runs is highly dependant on how efficient the host application -is. - -The library can (and will) request memory and I/O data from the host app -via callback function pointers contained within the context structure. There -is currently no API function to set them, it is assumed that the host -application will assign to them the address of functions within itself that -will fullfill the I/O request. - -There are currently four callback functions to the host app: - -void (*on_read_memory)(/* softx86_ctx */ void* _ctx, - sx86_udword address,sx86_ubyte *buf,int size); - -void (*on_read_io)(/* softx86_ctx */ void* _ctx,sx86_udword address, - sx86_ubyte *buf,int size); - -void (*on_write_memory)(/* softx86_ctx */ void* _ctx,sx86_udword address, - sx86_ubyte *buf,int size); - -void (*on_write_io)(/* softx86_ctx */ void* _ctx,sx86_udword address, - sx86_ubyte *buf,int size); - -on_read_memory: called when the CPU wants to fetch from simulated memory -on_write_memory: called when the CPU wants to store to simulated memory -on_read_io: called when the CPU wants to fetch from an I/O port - (typically the IN/INSB instruction) -on_write_io: called when the CPU wants to store to an I/O port - (typically the OUT/OUTSB instruction) - -SOFTX86 DOESN'T SUPPORT FPU INSTRUCTIONS BY ITSELF -================================================== - -Softx86 does not support FPU instructions by itself, -following the design of the original chip. Instead, -FPU opcodes are handed off to a callback function -which can then call an external library that functions -as the 8087. If the callback function is not assigned, -the FPU opcodes D8h thru DFh are treated as unknown and -invalid opcodes. - -/* this is called when the CPU is asked to execute an FPU opcode */ -int (*on_fpu_opcode_exec) - (/* softx86_ctx */void* _ctx,sx86_ubyte opcode); - -/* this is called when the CPU is asked to decompile an FPU opcode */ -int (*on_fpu_opcode_dec) - (/* softx86_ctx */void* _ctx,sx86_ubyte opcode,char buf[128]); - diff --git a/lib/3rdparty/softx86/softx86.dsw b/lib/3rdparty/softx86/softx86.dsw deleted file mode 100644 index 13941ea8b33..00000000000 --- a/lib/3rdparty/softx86/softx86.dsw +++ /dev/null @@ -1,107 +0,0 @@ -Microsoft Developer Studio Workspace File, Format Version 6.00 -# WARNING: DO NOT EDIT OR DELETE THIS WORKSPACE FILE! - -############################################################################### - -Project: "softx86_dll"=.\softx86\softx86_dll.dsp - Package Owner=<4> - -Package=<5> -{{{ -}}} - -Package=<4> -{{{ - Begin Project Dependency - Project_Dep_Name softx86_static - End Project Dependency -}}} - -############################################################################### - -Project: "softx86_static"=.\softx86\softx86_static.dsp - Package Owner=<4> - -Package=<5> -{{{ -}}} - -Package=<4> -{{{ -}}} - -############################################################################### - -Project: "softx86dbg_dll"=.\softx86dbg\softx86dbg_dll.dsp - Package Owner=<4> - -Package=<5> -{{{ -}}} - -Package=<4> -{{{ - Begin Project Dependency - Project_Dep_Name softx86_dll - End Project Dependency - Begin Project Dependency - Project_Dep_Name softx87_dll - End Project Dependency -}}} - -############################################################################### - -Project: "softx86dbg_static"=.\softx86dbg\softx86dbg_static.dsp - Package Owner=<4> - -Package=<5> -{{{ -}}} - -Package=<4> -{{{ - Begin Project Dependency - Project_Dep_Name softx86_static - End Project Dependency - Begin Project Dependency - Project_Dep_Name softx87_static - End Project Dependency -}}} - -############################################################################### - -Project: "softx87_dll"=.\softx87\softx87_dll.dsp - Package Owner=<4> - -Package=<5> -{{{ -}}} - -Package=<4> -{{{ - Begin Project Dependency - Project_Dep_Name softx87_static - End Project Dependency -}}} - -############################################################################### - -Project: "softx87_static"=.\softx87\softx87_static.dsp - Package Owner=<4> - -Package=<5> -{{{ -}}} - -Package=<4> -{{{ -}}} - -############################################################################### - -Global: - -Package=<5> -{{{ -}}} - -Package=<3> -{{{ -}}} - -############################################################################### - diff --git a/lib/3rdparty/softx86/softx86/CMakeLists.txt b/lib/3rdparty/softx86/softx86/CMakeLists.txt deleted file mode 100644 index a6b61368267..00000000000 --- a/lib/3rdparty/softx86/softx86/CMakeLists.txt +++ /dev/null @@ -1,29 +0,0 @@ - -include_directories(${REACTOS_SOURCE_DIR}/include/reactos/libs/softx86) - -list(APPEND SOURCE - aaa.c - add.c - binops.c - cbw.c - clc.c - drooling_duh.c - fpu.c - groupies.c - inc.c - interrupts.c - ioport.c - jumpy.c - mov.c - optable.c - prefixes.c - procframe.c - pushpop.c - shovel.c - softx86.c -### Uncomment the following files for dll compilation: -# softx86_dll.def -# softx86_dll.rc -) - -add_library(softx86 ${SOURCE}) diff --git a/lib/3rdparty/softx86/softx86/Makefile b/lib/3rdparty/softx86/softx86/Makefile deleted file mode 100644 index 86336e76305..00000000000 --- a/lib/3rdparty/softx86/softx86/Makefile +++ /dev/null @@ -1,93 +0,0 @@ -# SOFTX86 Makefile for Linux/GCC 3.xx -# (C) 2003 Jonathan Campbell -# -# NOTE: Assumes subdirectory ./obj/ and places all object files there -# rather than mix them up with the source code. It's less messy -# that way. The only exception is the final output, softx86.o. - -all:: __obj ../lib/libsoftx86.a ../lib/libsoftx86.so - -ALL_OBJS = obj/aaa.o obj/add.o obj/cbw.o obj/clc.o obj/drooling_duh.o obj/optable.o obj/prefixes.o obj/procframe.o obj/pushpop.o obj/softx86.o obj/mov.o obj/ioport.o obj/inc.o obj/groupies.o obj/interrupts.o obj/binops.o obj/jumpy.o obj/shovel.o obj/fpu.o - -INCLUDZ = -I../include - -clean:: - rm -f $(ALL_OBJS) - -distclean:: clean - rm -f ../lib/libsoftx86.a - rm -f ../lib/libsoftx86.so - if [[ -d obj ]]; then rmdir obj; fi - if [[ -d Release ]]; then rm -R Release; fi # clean up mess - if [[ -d Debug ]]; then rm -R Debug; fi # made by MSVC++ - rm -f *.plg - rm -f *.opt - rm -f *.aps - -# make sure there is an "obj" subdirectory -__obj: - if [[ !(-d obj) ]]; then mkdir obj; fi - -../lib/libsoftx86.a: $(ALL_OBJS) - ld -aarchive -r -o ../lib/libsoftx86.a $(ALL_OBJS) - -../lib/libsoftx86.so: $(ALL_OBJS) - ld -shared -o ../lib/libsoftx86.so $(ALL_OBJS) - -obj/shovel.o: shovel.c - gcc $(INCLUDZ) -c -o obj/shovel.o shovel.c - -obj/jumpy.o: jumpy.c - gcc $(INCLUDZ) -c -o obj/jumpy.o jumpy.c - -obj/binops.o: binops.c - gcc $(INCLUDZ) -c -o obj/binops.o binops.c - -obj/interrupts.o: interrupts.c - gcc $(INCLUDZ) -c -o obj/interrupts.o interrupts.c - -obj/groupies.o: groupies.c - gcc $(INCLUDZ) -c -o obj/groupies.o groupies.c - -obj/aaa.o: aaa.c - gcc $(INCLUDZ) -c -o obj/aaa.o aaa.c - -obj/add.o: add.c - gcc $(INCLUDZ) -c -o obj/add.o add.c - -obj/cbw.o: cbw.c - gcc $(INCLUDZ) -c -o obj/cbw.o cbw.c - -obj/clc.o: clc.c - gcc $(INCLUDZ) -c -o obj/clc.o clc.c - -obj/drooling_duh.o: drooling_duh.c - gcc $(INCLUDZ) -c -o obj/drooling_duh.o drooling_duh.c - -obj/optable.o: optable.c - gcc $(INCLUDZ) -c -o obj/optable.o optable.c - -obj/prefixes.o: prefixes.c - gcc $(INCLUDZ) -c -o obj/prefixes.o prefixes.c - -obj/procframe.o: procframe.c - gcc $(INCLUDZ) -c -o obj/procframe.o procframe.c - -obj/pushpop.o: pushpop.c - gcc $(INCLUDZ) -c -o obj/pushpop.o pushpop.c - -obj/softx86.o: softx86.c - gcc $(INCLUDZ) -c -o obj/softx86.o softx86.c - -obj/mov.o: mov.c - gcc $(INCLUDZ) -c -o obj/mov.o mov.c - -obj/ioport.o: ioport.c - gcc $(INCLUDZ) -c -o obj/ioport.o ioport.c - -obj/inc.o: inc.c - gcc $(INCLUDZ) -c -o obj/inc.o inc.c - -obj/fpu.o: fpu.c - gcc $(INCLUDZ) -c -o obj/fpu.o fpu.c - diff --git a/lib/3rdparty/softx86/softx86/aaa.c b/lib/3rdparty/softx86/softx86/aaa.c deleted file mode 100644 index 10db37bde40..00000000000 --- a/lib/3rdparty/softx86/softx86/aaa.c +++ /dev/null @@ -1,284 +0,0 @@ -/* - * aaa.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for AAA/AAD/AAM/AAS/DAA instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "aaa.h" - -int Sfx86OpcodeExec_aaaseries(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x27) { // DAA - sx86_ubyte al,nal; - - al = ctx->state->general_reg[SX86_REG_AX].b.lo; - if (((al&0x0F) > 9) || (ctx->state->reg_flags.val & SX86_CPUFLAG_AUX)) { - nal = (al&0xF)+6; - al += 6; -/* if addition to lower nibble overflowed... */ - if (nal >= 0x10) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - } - else { - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - } - - if (((al & 0xF0) > 0x90) || (ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY)) { - al += 0x60; - ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - } - else { - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* "The OF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* SF emulation */ - if (al & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* ZF emulation */ - if (!al) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* PF emulation */ - if (softx86_parity8(al)) ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - ctx->state->general_reg[SX86_REG_AX].b.lo = al; - return 1; - } - - if (opcode == 0x2F) { // DAS - sx86_ubyte al; - int nal; - - al = ctx->state->general_reg[SX86_REG_AX].b.lo; - if (((al&0x0F) > 9) || (ctx->state->reg_flags.val & SX86_CPUFLAG_AUX)) { - nal = (al&0xF)-6; - al -= 6; -/* if subtraction from lower nibble overflowed... */ - if (nal < 0) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - } - else { - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - } - - if ((al > 0x9F) || (ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY)) { - al -= 0x60; - ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - } - else { - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* "The OF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* SF emulation */ - if (al & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* ZF emulation */ - if (!al) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* PF emulation */ - if (softx86_parity8(al)) ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - ctx->state->general_reg[SX86_REG_AX].b.lo = al; - return 1; - } - - if (opcode == 0x37) { // AAA - sx86_ubyte ah,al; - - al = ctx->state->general_reg[SX86_REG_AX].b.lo; - ah = ctx->state->general_reg[SX86_REG_AX].b.hi; - - if (((al&0xF) > 9) || (ctx->state->reg_flags.val & SX86_CPUFLAG_AUX)) { - al += 6; ah++; - ctx->state->reg_flags.val |= (SX86_CPUFLAG_AUX | SX86_CPUFLAG_CARRY); - } - else { - ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_AUX | SX86_CPUFLAG_CARRY); - } - - ctx->state->general_reg[SX86_REG_AX].b.hi = ah; - ctx->state->general_reg[SX86_REG_AX].b.lo = al & 0xF; - -/* "OF, SF, ZF, and PF flags are undefined" */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - - return 1; - } - - if (opcode == 0x3F) { // AAS - sx86_ubyte ah,al; - - al = ctx->state->general_reg[SX86_REG_AX].b.lo; - ah = ctx->state->general_reg[SX86_REG_AX].b.hi; - - if (((al&0xF) > 9) || (ctx->state->reg_flags.val & SX86_CPUFLAG_AUX)) { - al -= 6; ah--; - ctx->state->reg_flags.val |= (SX86_CPUFLAG_AUX | SX86_CPUFLAG_CARRY); - } - else { - ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_AUX | SX86_CPUFLAG_CARRY); - } - - ctx->state->general_reg[SX86_REG_AX].b.hi = ah; - ctx->state->general_reg[SX86_REG_AX].b.lo = al & 0xF; - -/* "OF, SF, ZF, and PF flags are undefined" */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - - return 1; - } - - if (opcode == 0xD4) { // AAM - sx86_ubyte ah,al,x; - - x = softx86_fetch_exec_byte(ctx); - al = ctx->state->general_reg[SX86_REG_AX].b.lo; - - if (x == 0) { - /* TODO: signal division by zero exception */ - } - else { - al = al % x; - ah = al / x; - } - - ctx->state->general_reg[SX86_REG_AX].b.hi = ah; - ctx->state->general_reg[SX86_REG_AX].b.lo = al; - -/* SF emulation */ - if (al & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* ZF emulation */ - if (!al) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* PF emulation */ - if (softx86_parity8(al)) ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - -/* "The OF, AF and CF flags are undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - - return 1; - } - - if (opcode == 0xD5) { // AAD - sx86_ubyte ah,al,x; - - x = softx86_fetch_exec_byte(ctx); - al = ctx->state->general_reg[SX86_REG_AX].b.lo; - ah = ctx->state->general_reg[SX86_REG_AX].b.hi; - - al = (al + (ah * x)) & 0xFF; - ah = 0; - - ctx->state->general_reg[SX86_REG_AX].b.hi = ah; - ctx->state->general_reg[SX86_REG_AX].b.lo = al; - -/* SF emulation */ - if (al & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* ZF emulation */ - if (!al) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* PF emulation */ - if (softx86_parity8(al)) ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - -/* "The OF, AF and CF flags are undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_aaaseries(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - sx86_ubyte x; - - if (opcode == 0x27) { // DAA - strcpy(buf,"DAA"); - return 1; - } - - if (opcode == 0x2F) { // DAS - strcpy(buf,"DAS"); - return 1; - } - - if (opcode == 0x37) { // AAA - strcpy(buf,"AAA"); - return 1; - } - - if (opcode == 0x3F) { // AAS - strcpy(buf,"AAS"); - return 1; - } - - if (opcode == 0xD4) { // AAM - x = softx86_fetch_dec_byte(ctx); - if (x == 10) strcpy(buf,"AAM"); - else sprintf(buf,"AAM %d",x); - - return 1; - } - - if (opcode == 0xD5) { // AAD - x = softx86_fetch_dec_byte(ctx); - if (x == 10) strcpy(buf,"AAD"); - else sprintf(buf,"AAD %d",x); - - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/aaa.h b/lib/3rdparty/softx86/softx86/aaa.h deleted file mode 100644 index cec97710f7e..00000000000 --- a/lib/3rdparty/softx86/softx86/aaa.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_aaaseries(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_aaaseries(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/add.c b/lib/3rdparty/softx86/softx86/add.c deleted file mode 100644 index 9b356cc6e61..00000000000 --- a/lib/3rdparty/softx86/softx86/add.c +++ /dev/null @@ -1,1027 +0,0 @@ -/* - * add.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for ADD/SUB/ADC/SBB/CMP instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "add.h" - -sx86_ubyte op_add8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - -/* peform the addition */ - ret = src + val; - -/* if carry */ - if ((ret < src) || (ret < val)) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* if overflow */ - if (((src & 0x80) == (val & 0x80)) && ((src & 0x80) != (ret & 0x80))) - { - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - } - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if (((val&0xF)+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_add16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - -/* peform the addition */ - ret = src + val; - -/* if carry */ - if ((ret < src) || (ret < val)) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* if overflow */ - if (((src & 0x8000) == (val & 0x8000)) && ((src & 0x8000) != (ret & 0x8000))) - { - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - } - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if (((val&0xF)+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_add32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - -/* peform the addition */ - ret = src + val; - -/* if carry */ - if ((ret < src) || (ret < val)) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* if overflow */ - if (((src & 0x80000000) == (val & 0x80000000)) - && ((src & 0x80000000) != (ret & 0x80000000))) - { - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - } - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if (((val&0xF)+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_adc8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret,carry; - - carry = ((sx86_ubyte)(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY))?1:0; - -/* special case: x + 0xFF + (carry=1) == x */ - if (carry && val == 0xFF) { -/* peform the addition */ - ret = val; - -/* it's a carry over */ - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - else { -/* peform the addition */ - ret = src + val + carry; - -/* if carry/overflow */ - if (ret < src) - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - else - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if (((val&0xF)+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_adc16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret,carry; - - carry = ((sx86_ubyte)(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY))?1:0; - -/* special case: x + 0xFFFF + (carry=1) == x */ - if (carry && val == 0xFFFF) { -/* peform the addition */ - ret = val; - -/* it's a carry over */ - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - else { -/* peform the addition */ - ret = src + val + carry; - -/* if carry/overflow */ - if (ret < src) - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - else - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if (((val&0xF)+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_adc32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret,carry; - - carry = ((sx86_ubyte)(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY))?1:0; - -/* special case: x + 0xFFFFFFFF + (carry=1) == x */ - if (carry && val == 0xFFFFFFFF) { -/* peform the addition */ - ret = val; - -/* it's a carry over */ - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - else { -/* peform the addition */ - ret = src + val + carry; - -/* if carry/overflow */ - if (ret < src) - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - else - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if (((val&0xF)+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_sub8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - -/* peform the addition */ - ret = src - val; - -/* if carry */ - if (val > src) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* if overflow */ - if (((src & 0x80) != (val & 0x80)) && ((src & 0x80) != (ret & 0x80))) - { - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - } - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause a carry. */ - if ((val&0xF) > (src&0xF)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_sub16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - -/* peform the addition */ - ret = src - val; - -/* if carry */ - if (val > src) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* if overflow */ - if (((src & 0x8000) != (val & 0x8000)) && ((src & 0x8000) != (ret & 0x8000))) - { - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - } - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause a carry. */ - if ((val&0xF) > (src&0xF)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_sub32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - -/* peform the addition */ - ret = src - val; - -/* if carry */ - if (val > src) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* if overflow */ - if (((src & 0x80000000) != (val & 0x80000000)) - && ((src & 0x80000000) != (ret & 0x80000000))) - { - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - } - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause a carry. */ - if ((val&0xF) > (src&0xF)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_sbb8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret,carry; - - carry = ((sx86_ubyte)(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY))?1:0; - -/* special case: x - 0xFF - (carry=1) == x */ - if (carry && val == 0xFF) { -/* peform the addition */ - ret = val; - -/* it's a carry over */ - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - else { -/* peform the addition */ - ret = src - (val + carry); - -/* if carry/overflow */ - if (ret > src) - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - else - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause a carry. */ - if ((val&0xF) > (src&0xF)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_sbb16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret,carry; - - carry = ((sx86_ubyte)(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY))?1:0; - -/* special case: x + 0xFFFF + (carry=1) == x */ - if (carry && val == 0xFFFF) { -/* peform the addition */ - ret = val; - -/* it's a carry over */ - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - else { -/* peform the addition */ - ret = src - (val + carry); - -/* if carry/overflow */ - if (ret > src) - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - else - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause a carry. */ - if ((val&0xF) > (src&0xF)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_sbb32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret,carry; - - carry = ((sx86_ubyte)(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY))?1:0; - -/* special case: x + 0xFFFFFFFF + (carry=1) == x */ - if (carry && val == 0xFFFFFFFF) { -/* peform the addition */ - ret = val; - -/* it's a carry over */ - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - else { -/* peform the addition */ - ret = src - (val + carry); - -/* if carry/overflow */ - if (ret > src) - ctx->state->reg_flags.val |= - (SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - else - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause a carry. */ - if ((val&0xF) > (src&0xF)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -int Sfx86OpcodeExec_add(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x00) { // ADD reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_add8,op_add16,op_add32); - - return 1; - } - if (opcode == 0x04) { // ADD AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_add8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x05) { // ADD AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_add16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_add(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x00) { // ADD reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"ADD %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"ADD %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x04) { // ADD AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"ADD AL,%02Xh",x); - return 1; - } - if (opcode == 0x05) { // ADD AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"ADD AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_adc(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x10) { // ADC reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_adc8,op_adc16,op_adc32); - - return 1; - } - if (opcode == 0x14) { // ADC AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_adc8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x15) { // ADC AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_adc16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_adc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x10) { // ADC reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"ADC %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"ADC %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x14) { // ADC AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"ADC AL,%02Xh",x); - return 1; - } - if (opcode == 0x15) { // ADC AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"ADC AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_sub(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x28) { // SUB reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_sub8,op_sub16,op_sub32); - - return 1; - } - if (opcode == 0x2C) { // SUB AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_sub8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x2D) { // SUB AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_sub16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_sub(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x28) { // SUB reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"SUB %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"SUB %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x2C) { // SUB AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"SUB AL,%02Xh",x); - return 1; - } - if (opcode == 0x2D) { // SUB AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"SUB AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_sbb(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x18) { // SBB reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_sbb8,op_sbb16,op_sbb32); - - return 1; - } - if (opcode == 0x1C) { // SBB AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_sbb8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x1D) { // SBB AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_sbb16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_sbb(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x18) { // SBB reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"SBB %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"SBB %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x1C) { // SBB AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"SBB AL,%02Xh",x); - return 1; - } - if (opcode == 0x1D) { // SBB AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"SBB AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_cmp(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x38) { // CMP reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_ro(ctx,w16,0,mod,reg, // we use the variant - rm,opswap,op_sub8,op_sub16,op_sub32); // that DOES NOT modify - // the destination - // register, since CMP - // is documented to - // perform subtraction - // in a temporary register - - return 1; - } - if (opcode == 0x3C) { // CMP AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - op_sub8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - return 1; - } - if (opcode == 0x3D) { // CMP AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - op_sub16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_cmp(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x38) { // CMP reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // add from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"CMP %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"CMP %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x3C) { // CMP AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"CMP AL,%02Xh",x); - return 1; - } - if (opcode == 0x3D) { // CMP AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"CMP AX,%04Xh",x); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/add.h b/lib/3rdparty/softx86/softx86/add.h deleted file mode 100644 index 8a6ddb3043c..00000000000 --- a/lib/3rdparty/softx86/softx86/add.h +++ /dev/null @@ -1,24 +0,0 @@ - -int Sfx86OpcodeExec_adc(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_adc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_add(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_add(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_sbb(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_sbb(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_sub(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_sub(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_cmp(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_cmp(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); - -sx86_ubyte op_adc8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_adc16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_adc32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_add8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_add16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_add32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_sbb8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_sbb16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_sbb32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_sub8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_sub16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_sub32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); diff --git a/lib/3rdparty/softx86/softx86/binops.c b/lib/3rdparty/softx86/softx86/binops.c deleted file mode 100644 index bd440632b51..00000000000 --- a/lib/3rdparty/softx86/softx86/binops.c +++ /dev/null @@ -1,2868 +0,0 @@ -/* - * binops.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for XOR/OR/TEST instruction. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "binops.h" - -/************************************************** - ************** SAR 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_sar8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret,osrc,sa; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - osrc = src; - ret = src; - sa = (src&0x80)?(0xFF<<(8-shic)):0; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret >>= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret >>= 1; - ret |= sa; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST)" */ - if (osrc>>7) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_sar1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_sar8(ctx,src,1); -} - -sx86_ubyte op_sar_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_sar8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_sar16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret,osrc; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - osrc = src; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret >>= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret >>= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST)" */ - if (osrc>>15) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_sar1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_sar16(ctx,src,1); -} - -sx86_uword op_sar_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_sar16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_sar32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret,osrc; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - osrc = src; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret >>= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret >>= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST)" */ - if (osrc>>31) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_sar1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_sar32(ctx,src,1); -} - -sx86_udword op_sar_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_sar32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** SHR 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_shr8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret,osrc; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - osrc = src; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret >>= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret >>= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST)" */ - if (osrc>>7) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_shr1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_shr8(ctx,src,1); -} - -sx86_ubyte op_shr_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_shr8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_shr16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret,osrc; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - osrc = src; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret >>= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret >>= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST)" */ - if (osrc>>15) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_shr1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_shr16(ctx,src,1); -} - -sx86_uword op_shr_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_shr16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_shr32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret,osrc; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - osrc = src; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret >>= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret >>= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST)" */ - if (osrc>>31) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_shr1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_shr32(ctx,src,1); -} - -sx86_udword op_shr_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_shr32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** SHL 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_shl8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret <<= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret <<= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>7)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_shl1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_shl8(ctx,src,1); -} - -sx86_ubyte op_shl_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_shl8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_shl16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret <<= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret <<= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>15)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_shl1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_shl16(ctx,src,1); -} - -sx86_uword op_shl_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_shl16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_shl32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - int shic,oshic; - - if (ctx->bugs->mask_5bit_shiftcount) - oshic = val&0x1F; - else - oshic = val; - -/* Intel explicity documents that CF carries the bit that was - shifted out, and that all flags are untouched if CF=0. */ - if (!oshic) /* works for me... */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = src; - -/* WARNING: This code assumes shic != 0 */ - if (shic > 1) - ret <<= (shic-1); - -/* "The CF flag contains the value of the last bit shifted out..." */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - ret <<= 1; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>31)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_shl1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_shl32(ctx,src,1); -} - -sx86_udword op_shl_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_shl32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** ROR 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_ror8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - int shic,oshic; - - oshic = val&7; - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = (src>>shic)|(src<<(8-shic)); - -/* "CF <- MSB(DEST)" */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR MSB - 1(DEST)" */ - if ((ret>>7)^((ret>>6)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_ror1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_ror8(ctx,src,1); -} - -sx86_ubyte op_ror_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_ror8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_ror16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - int shic,oshic; - - oshic = val&15; - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = (src>>shic)|(src<<(16-shic)); - -/* "CF <- MSB(DEST)" */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR MSB - 1(DEST)" */ - if ((ret>>15)^((ret>>14)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_ror1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_ror16(ctx,src,1); -} - -sx86_uword op_ror_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_ror16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_ror32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - int shic,oshic; - - oshic = val&31; - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = (src>>shic)|(src<<(32-shic)); - -/* "CF <- MSB(DEST)" */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR MSB - 1(DEST)" */ - if ((ret>>31)^((ret>>30)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_ror1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_ror32(ctx,src,1); -} - -sx86_udword op_ror_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_ror32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** ROL 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_rol8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - int shic,oshic; - - oshic = val&7; - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = (src<>(8-shic)); - -/* "CF <- LSB(DEST)" */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>7)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_rol1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_rol8(ctx,src,1); -} - -sx86_ubyte op_rol_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_rol8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_rol16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - int shic,oshic; - - oshic = val&15; - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = (src<>(16-shic)); - -/* "CF <- LSB(DEST)" */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>15)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_rol1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_rol16(ctx,src,1); -} - -sx86_uword op_rol_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_rol16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_rol32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - int shic,oshic; - - oshic = val&31; - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - shic = oshic; - ret = (src<>(32-shic)); - -/* "CF <- LSB(DEST)" */ - if (ret & 1) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>31)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_rol1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_rol32(ctx,src,1); -} - -sx86_udword op_rol_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_rol32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** RCL 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_rcl8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret,cf; - int shic,oshic; - - oshic = val%9; /* 8 bits + CF */ - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - ret = src; - shic = oshic; - while (shic-- > 0) { - cf = ret>>7; - ret = (ret<<1)|((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1); - if (cf) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>7)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_rcl1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_rcl8(ctx,src,1); -} - -sx86_ubyte op_rcl_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_rcl8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_rcl16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret,cf; - int shic,oshic; - - oshic = val%17; /* 16 bits + CF */ - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - ret = src; - shic = oshic; - while (shic-- > 0) { - cf = ret>>15; - ret = (ret<<1)|((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1); - if (cf) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>15)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_rcl1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_rcl16(ctx,src,1); -} - -sx86_uword op_rcl_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_rcl16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_rcl32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret,cf; - int shic,oshic; - - oshic = val%33; /* 32 bits + CF */ - if (!oshic) /* don't bother */ - return src; - -/* peform the operation. */ - ret = src; - shic = oshic; - while (shic-- > 0) { - cf = ret>>31; - ret = (ret<<1)|((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1); - if (cf) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* the OF flag follows some sort of bizarre logic */ - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>31)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_rcl1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_rcl32(ctx,src,1); -} - -sx86_udword op_rcl_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_rcl32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** RCR 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_rcr8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret,cf; - int shic,oshic; - - oshic = val%9; /* 8 bits + CF */ - if (!oshic) /* don't bother */ - return src; - -/* the OF flag follows some sort of bizarre logic... and... - why is this done BEFORE the operation (according to - the pseudocode)? */ - ret = src; - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>7)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* peform the operation. */ - shic = oshic; - while (shic-- > 0) { - cf = ret&1; - ret = (ret>>1)|(((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)<<7); - if (cf) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_rcr1_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_rcr8(ctx,src,1); -} - -sx86_ubyte op_rcr_cl_8(softx86_ctx* ctx,sx86_ubyte src) -{ - return op_rcr8(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_uword op_rcr16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret,cf; - int shic,oshic; - - oshic = val%17; /* 16 bits + CF */ - if (!oshic) /* don't bother */ - return src; - -/* the OF flag follows some sort of bizarre logic... and... - why is this done BEFORE the operation (according to - the pseudocode)? */ - ret = src; - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>15)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* peform the operation. */ - shic = oshic; - while (shic-- > 0) { - cf = ret&1; - ret = (ret>>1)|(((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)<<15); - if (cf) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_rcr1_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_rcr16(ctx,src,1); -} - -sx86_uword op_rcr_cl_16(softx86_ctx* ctx,sx86_uword src) -{ - return op_rcr16(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -sx86_udword op_rcr32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret,cf; - int shic,oshic; - - oshic = val%33; /* 32 bits + CF */ - if (!oshic) /* don't bother */ - return src; - -/* the OF flag follows some sort of bizarre logic... and... - why is this done BEFORE the operation (according to - the pseudocode)? */ - ret = src; - if (oshic == 1) { -/* "OF <- MSB(DEST) XOR CF" */ - if ((ret>>31)^((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - else { -/* apparently undefined */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - } - -/* peform the operation. */ - shic = oshic; - while (shic-- > 0) { - cf = ret&1; - ret = (ret>>1)|(((ctx->state->reg_flags.val>>SX86_CPUFLAGBO_CARRY)&1)<<31); - if (cf) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - } - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_rcr1_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_rcr32(ctx,src,1); -} - -sx86_udword op_rcr_cl_32(softx86_ctx* ctx,sx86_udword src) -{ - return op_rcr32(ctx,src,ctx->state->general_reg[SX86_REG_CX].b.lo); -} - -/************************************************** - ************** XOR 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_xor8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - -/* peform the operation */ - ret = src ^ val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_xor16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - -/* peform the operation */ - ret = src ^ val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_xor32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - -/* peform the operation */ - ret = src ^ val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -/************************************************** - ************** OR 8/16/32 emulation ************** - **************************************************/ -sx86_ubyte op_or8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - -/* peform the operation */ - ret = src | val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_or16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - -/* peform the operation */ - ret = src | val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_or32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - -/* peform the operation */ - ret = src | val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -/************************************************** - ************** AND 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_and8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - -/* peform the operation */ - ret = src & val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_and16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - -/* peform the operation */ - ret = src & val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_and32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - -/* peform the operation */ - ret = src & val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -/************************************************** - ************* TEST 8/16/32 emulation ************* - **************************************************/ -/* apparently TEST is a lot like AND except for subtle differences... */ -sx86_ubyte op_test8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - sx86_ubyte ret; - -/* peform the operation */ - ret = src & val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. - NOTE: Intel's documentation states that only the lower 8 bits - are used in setting PF. Odd... */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_test16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - sx86_uword ret; - -/* peform the operation */ - ret = src & val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. - NOTE: Intel's documentation states that only the lower 8 bits - are used in setting PF. Odd... */ - if (softx86_parity8((sx86_ubyte)ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_test32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - sx86_udword ret; - -/* peform the operation */ - ret = src & val; - -/* carry/overflow always cleared */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_CARRY | SX86_CPUFLAG_OVERFLOW); - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* quoting Intel: "The state of the AF flag is undefined"... */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. - NOTE: Intel's documentation states that only the lower 8 bits - are used in setting PF. Odd... */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -/************************************************** - ************* NOT 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_not8(softx86_ctx* ctx,sx86_ubyte src) -{ -/* peform the operation, no flags are affected */ - return (~src); -} - -sx86_uword op_not16(softx86_ctx* ctx,sx86_uword src) -{ -/* peform the operation, no flags are affected */ - return (~src); -} - -sx86_udword op_not32(softx86_ctx* ctx,sx86_udword src) -{ -/* peform the operation, no flags are affected */ - return (~src); -} - -/************************************************* - ************* NEG 8/16/32 emulation ************* - *************************************************/ -sx86_ubyte op_neg8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_ubyte ret; - -/* peform the operation */ - ret = (~src)+1; /* binary equivalent of x = 0 - x */ - -/* carry set if operand was and still is 0 (since NEG 0 = 0) */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* Intel isn't clear how the OF flag is set "according to the result" */ -/* perhaps this is a minor detail that most programmers and clone - chip makers overlook anyway... but here is my interpretation of it. - based on the assumption that the chip just inverts the bits then adds - +1. ((NOT 0) + 1) = 0x100, and 0x100 squeezed into 8 bits is 0x00 - with one bit that "overflowed". */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Intel isn't clear on how this flag is set either. */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_neg16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_uword ret; - -/* peform the operation */ - ret = (~src)+1; /* binary equivalent of x = 0 - x */ - -/* carry set if operand was and still is 0 (since NEG 0 = 0) */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* Intel isn't clear how the OF flag is set "according to the result" */ -/* perhaps this is a minor detail that most programmers and clone - chip makers overlook anyway... but here is my interpretation of it. - based on the assumption that the chip just inverts the bits then adds - +1. ((NOT 0) + 1) = 0x10000, and 0x10000 squeezed into 16 bits is 0x00 - with one bit that "overflowed". */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Intel isn't clear on how this flag is set either. */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_neg32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_udword ret; - -/* peform the operation */ - ret = (~src)+1; /* binary equivalent of x = 0 - x */ - -/* carry set if operand was and still is 0 (since NEG 0 = 0) */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - -/* Intel isn't clear how the OF flag is set "according to the result" */ -/* perhaps this is a minor detail that most programmers and clone - chip makers overlook anyway... but here is my interpretation of it. - based on the assumption that the chip just inverts the bits then adds - +1. ((NOT 0) + 1) = 0x100000000, and 0x100000000 squeezed into 32 bits - is 0x00 with one bit that "overflowed". */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_OVERFLOW; - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Intel isn't clear on how this flag is set either. */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity32(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -/************************************************* - ************* MUL 8/16/32 emulation ************* - *************************************************/ -sx86_ubyte op_mul8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_uword result; - -/* peform the operation AX = AL * r/m8 */ - result = ((sx86_uword)ctx->state->general_reg[SX86_REG_AX].b.lo); - result *= ((sx86_uword)src); - -/* the result is stored into AX */ - ctx->state->general_reg[SX86_REG_AX].w.lo = result; - -/* OF and CF are set if the upper half is nonzero */ - if (result>>8) ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY); - -/* Intel documents SF ZF AF and PF as "undefined" after this instruction. */ -/* We'll just set them anyway by the normal rules... */ -/* if result treated as signed value is negative */ - if (result & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!result) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Whatever */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity16(result)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_uword op_mul16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_udword result; - -/* peform the operation DX:AX = AX * r/m16 */ - result = ((sx86_udword)ctx->state->general_reg[SX86_REG_AX].w.lo); - result *= ((sx86_udword)src); - -/* the result is stored into DX:AX */ - ctx->state->general_reg[SX86_REG_AX].w.lo = (sx86_uword)(result&0xFFFF); - ctx->state->general_reg[SX86_REG_DX].w.lo = (sx86_uword)(result>>16); - -/* OF and CF are set if the upper half is nonzero */ - if (result>>16) ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY); - -/* Intel documents SF ZF AF and PF as "undefined" after this instruction. */ -/* We'll just set them anyway by the normal rules... */ -/* if result treated as signed value is negative */ - if (result & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!result) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Whatever */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity32(result)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_udword op_mul32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_uldword result; - -/* peform the operation EDX:EAX = EAX * r/m32 */ - result = ((sx86_uldword)ctx->state->general_reg[SX86_REG_AX].val); - result *= ((sx86_uldword)src); - -/* the result is stored into EDX:EAX */ - ctx->state->general_reg[SX86_REG_AX].val = (sx86_udword)(result&0xFFFFFFFF); - ctx->state->general_reg[SX86_REG_DX].val = (sx86_udword)(result>>32); - -/* OF and CF are set if the upper half is nonzero */ - if (result>>32) ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY; - else ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY); - -/* Intel documents SF ZF AF and PF as "undefined" after this instruction. */ -/* We'll just set them anyway by the normal rules... */ -/* if result treated as signed value is negative */ - if (result & 0x8000000000000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!result) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Whatever */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity64(result)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -/************************************************** - ************* IMUL 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_imul8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_sword result; - -/* peform the operation AX = AL * r/m8 */ - result = (sx86_sword)((sx86_sbyte)ctx->state->general_reg[SX86_REG_AX].b.lo); - result *= (sx86_sword)((sx86_sbyte)src); - -/* the result is stored into AX */ - ctx->state->general_reg[SX86_REG_AX].w.lo = result; - -/* OF and CF are set if the upper half is nonzero */ - if ((result>>8) == 0 || ((result>>8)&0xFF) == 0xFF) - ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY); - else - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY; - -/* Intel documents SF ZF AF and PF as "undefined" after this instruction. */ -/* We'll just set them anyway by the normal rules... */ -/* if result treated as signed value is negative */ - if (result & 0x8000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!result) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Whatever */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity16(result)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_uword op_imul16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_sdword result; - -/* peform the operation AX = AL * r/m8 */ - result = (sx86_sdword)((sx86_sword)ctx->state->general_reg[SX86_REG_AX].w.lo); - result *= (sx86_sdword)((sx86_sword)src); - -/* the result is stored into AX */ - ctx->state->general_reg[SX86_REG_AX].w.lo = (sx86_uword)(result&0xFFFF); - ctx->state->general_reg[SX86_REG_DX].w.lo = (sx86_uword)(result>>16); - -/* OF and CF are set if the upper half is nonzero */ - if ((result>>16) == 0 || ((result>>16)&0xFFFF) == 0xFFFF) - ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY); - else - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY; - -/* Intel documents SF ZF AF and PF as "undefined" after this instruction. */ -/* We'll just set them anyway by the normal rules... */ -/* if result treated as signed value is negative */ - if (result & 0x80000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!result) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Whatever */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity32(result)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_udword op_imul32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_sldword result; - -/* peform the operation AX = AL * r/m8 */ - result = (sx86_sldword)((sx86_sdword)ctx->state->general_reg[SX86_REG_AX].val); - result *= (sx86_sldword)((sx86_sdword)src); - -/* the result is stored into AX */ - ctx->state->general_reg[SX86_REG_AX].val = (sx86_uword)(result&0xFFFFFFFF); - ctx->state->general_reg[SX86_REG_DX].val = (sx86_uword)(result>>32); - -/* OF and CF are set if the upper half is nonzero */ - if ((result>>32) == 0 || ((result>>32)&0xFFFFFFFF) == 0xFFFFFFFF) - ctx->state->reg_flags.val &= ~(SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY); - else - ctx->state->reg_flags.val |= SX86_CPUFLAG_OVERFLOW | SX86_CPUFLAG_CARRY; - -/* Intel documents SF ZF AF and PF as "undefined" after this instruction. */ -/* We'll just set them anyway by the normal rules... */ -/* if result treated as signed value is negative */ - if (result & 0x8000000000000000) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!result) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* Whatever */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit. */ - if (softx86_parity64(result)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -/************************************************* - ************* DIV 8/16/32 emulation ************* - *************************************************/ -sx86_ubyte op_div8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_uword result; - -/* signal division overflow */ - if (src == 0) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* peform the operation AL = AX / r/m8 */ - result = ((sx86_uword)ctx->state->general_reg[SX86_REG_AX].w.lo) / ((sx86_uword)src); - -/* signal division overflow */ - if (result > 0xFF) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* the result is stored into AL, remainder in AH */ - ctx->state->general_reg[SX86_REG_AX].b.hi = - ((sx86_uword)ctx->state->general_reg[SX86_REG_AX].w.lo) % ((sx86_uword)src); - ctx->state->general_reg[SX86_REG_AX].b.lo = (sx86_ubyte)result; - -/* Apparently all the flags are undefined after this instruction. */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_SIGN | SX86_CPUFLAG_ZERO | SX86_CPUFLAG_AUX | SX86_CPUFLAG_PARITY); - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_uword op_div16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_udword result; - -/* signal division overflow */ - if (src == 0) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* peform the operation AX = DX:AX / r/m16 */ - result = ((sx86_udword)ctx->state->general_reg[SX86_REG_AX].w.lo); - result |= ((sx86_udword)ctx->state->general_reg[SX86_REG_DX].w.lo)<<16; - result /= ((sx86_udword)src); - -/* signal division overflow */ - if (result > 0xFFFF) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* the result is stored into AX, remainder in DX */ - ctx->state->general_reg[SX86_REG_DX].w.lo = - ((sx86_uword)ctx->state->general_reg[SX86_REG_AX].w.lo) % ((sx86_uword)src); - ctx->state->general_reg[SX86_REG_AX].w.lo = (sx86_uword)result; - -/* Apparently all the flags are undefined after this instruction. */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_SIGN | SX86_CPUFLAG_ZERO | SX86_CPUFLAG_AUX | SX86_CPUFLAG_PARITY); - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_udword op_div32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_uldword result; - -/* signal division overflow */ - if (src == 0) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* peform the operation AX = EDX:EAX / r/m32 */ - result = ((sx86_uldword)ctx->state->general_reg[SX86_REG_AX].val); - result |= ((sx86_uldword)ctx->state->general_reg[SX86_REG_DX].val)<<32; - result /= ((sx86_uldword)src); - -/* signal division overflow */ - if (result > 0xFFFFFFFFL) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* the result is stored into EAX, remainder in EDX */ - ctx->state->general_reg[SX86_REG_DX].val = - ((sx86_udword)ctx->state->general_reg[SX86_REG_AX].val) % ((sx86_udword)src); - ctx->state->general_reg[SX86_REG_AX].val = (sx86_udword)result; - -/* Apparently all the flags are undefined after this instruction. */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_SIGN | SX86_CPUFLAG_ZERO | SX86_CPUFLAG_AUX | SX86_CPUFLAG_PARITY); - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -/************************************************** - ************* IDIV 8/16/32 emulation ************* - **************************************************/ -sx86_ubyte op_idiv8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_sword result; - -/* signal division overflow */ - if (src == 0) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* peform the operation AL = AX / r/m8 */ - result = ((sx86_sword)ctx->state->general_reg[SX86_REG_AX].w.lo) / ((sx86_sbyte)src); - -/* signal division overflow */ - if (result < -0x80 || result >= 0x80) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* the result is stored into AL, remainder in AH */ - ctx->state->general_reg[SX86_REG_AX].b.hi = - ((sx86_sword)ctx->state->general_reg[SX86_REG_AX].w.lo) % ((sx86_sbyte)src); - ctx->state->general_reg[SX86_REG_AX].b.lo = (sx86_ubyte)result; - -/* Apparently all the flags are undefined after this instruction. */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_SIGN | SX86_CPUFLAG_ZERO | SX86_CPUFLAG_AUX | SX86_CPUFLAG_PARITY); - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_uword op_idiv16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_sdword result; - -/* signal division overflow */ - if (src == 0) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* peform the operation AX = DX:AX / r/m16 */ - result = ((sx86_sdword)ctx->state->general_reg[SX86_REG_AX].w.lo); - result |= ((sx86_sdword)ctx->state->general_reg[SX86_REG_DX].w.lo)<<16; - result /= ((sx86_sword)src); - -/* signal division overflow */ - if (result < -0x8000 || result >= 0x8000) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* the result is stored into AX, remainder in DX */ - ctx->state->general_reg[SX86_REG_DX].w.lo = - ((sx86_sword)ctx->state->general_reg[SX86_REG_AX].w.lo) % ((sx86_sword)src); - ctx->state->general_reg[SX86_REG_AX].w.lo = (sx86_uword)result; - -/* Apparently all the flags are undefined after this instruction. */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_SIGN | SX86_CPUFLAG_ZERO | SX86_CPUFLAG_AUX | SX86_CPUFLAG_PARITY); - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -sx86_udword op_idiv32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_sldword result; - -/* signal division overflow */ - if (src == 0) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* peform the operation AX = EDX:EAX / r/m32 */ - result = ((sx86_sldword)ctx->state->general_reg[SX86_REG_AX].val); - result |= ((sx86_sldword)ctx->state->general_reg[SX86_REG_DX].val)<<32; - result /= ((sx86_sldword)src); - -/* signal division overflow */ - if (result < -0x80000000 || result >= 0x80000000) { - softx86_int_sw_signal(ctx,0); - return src; - } - -/* the result is stored into EAX, remainder in EDX */ - ctx->state->general_reg[SX86_REG_DX].val = - ((sx86_sdword)ctx->state->general_reg[SX86_REG_AX].val) % ((sx86_sdword)src); - ctx->state->general_reg[SX86_REG_AX].val = (sx86_sdword)result; - -/* Apparently all the flags are undefined after this instruction. */ - ctx->state->reg_flags.val &= - ~(SX86_CPUFLAG_SIGN | SX86_CPUFLAG_ZERO | SX86_CPUFLAG_AUX | SX86_CPUFLAG_PARITY); - - return src; /* this is called by sx86_exec_full_modrmonly_ro() so it doesn't matter */ -} - -int Sfx86OpcodeExec_xor(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x30) { // XOR reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // XOR from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_xor8,op_xor16,op_xor32); - - return 1; - } - if (opcode == 0x34) { // XOR AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_xor8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x35) { // XOR AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_xor16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_xor(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x30) { // XOR reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // XOR from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"XOR %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"XOR %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x34) { // XOR AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"XOR AL,%02Xh",x); - return 1; - } - if (opcode == 0x35) { // XOR AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"XOR AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_or(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x08) { // OR reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // OR from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_or8,op_or16,op_or32); - - return 1; - } - if (opcode == 0x0C) { // OR AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_or8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x0D) { // OR AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_or16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_or(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x08) { // OR reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // OR from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"OR %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"OR %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x0C) { // OR AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"OR AL,%02Xh",x); - return 1; - } - if (opcode == 0x0D) { // OR AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"OR AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_and(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x20) { // AND reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // AND from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_and8,op_and16,op_and32); - - return 1; - } - if (opcode == 0x24) { // AND AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - x = op_and8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - ctx->state->general_reg[SX86_REG_AX].b.lo = x; - return 1; - } - if (opcode == 0x25) { // AND AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - x = op_and16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - ctx->state->general_reg[SX86_REG_AX].w.lo = x; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_and(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x20) { // AND reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // AND from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"AND %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"AND %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0x24) { // AND AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"AND AL,%02Xh",x); - return 1; - } - if (opcode == 0x25) { // AND AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"AND AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_test(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0x84) { // TEST reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // TEST from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_ro(ctx,w16,0,mod,reg, // unlike AND, TEST does not - rm,opswap,op_test8,op_test16,op_test32); // modify the dest. operand - - return 1; - } - if (opcode == 0xA8) { // TEST AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_exec_byte(ctx); - op_test8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,x); - return 1; - } - if (opcode == 0xA9) { // TEST AX,imm16 - sx86_uword x; - - x = softx86_fetch_exec_byte(ctx); - x |= softx86_fetch_exec_byte(ctx) << 8; - op_test16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_test(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0x84) { // TEST reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // TEST from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"TEST %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"TEST %s,%s",op1_tmp,op2_tmp); - return 1; - } - if (opcode == 0xA8) { // TEST AL,imm8 - sx86_ubyte x; - - x = softx86_fetch_dec_byte(ctx); - sprintf(buf,"TEST AL,%02Xh",x); - return 1; - } - if (opcode == 0xA9) { // TEST AX,imm16 - sx86_uword x; - - x = softx86_fetch_dec_byte(ctx); - x |= softx86_fetch_dec_byte(ctx) << 8; - sprintf(buf,"TEST AX,%04Xh",x); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_xchg(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0x86) { // XCHG reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_xchg(ctx,w16,0,mod,reg,rm); - - return 1; - } - if ((opcode&0xF8) == 0x90) { // XCHG reg16,AX - sx86_uword tmp; - int ro; - -/* interesting fact: Apparently the opcode 0x90 that Intel documents as NOP (no-op) also - decodes to XCHG AX,AX (which does nothing anyway) */ - ro = opcode - 0x90; - tmp = ctx->state->general_reg[ro].w.lo; - ctx->state->general_reg[ro].w.lo = ctx->state->general_reg[SX86_REG_AX].w.lo; - ctx->state->general_reg[SX86_REG_AX].w.lo = tmp; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_xchg(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0x86) { // XCHG reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - sprintf(buf,"XCHG %s,%s",op1_tmp,op2_tmp); // for this instruction either way works - return 1; - } - if ((opcode&0xF8) == 0x90) { // XCHG reg16,AX - sprintf(buf,"XCHG %s,AX",sx86_regs16[opcode-0x90]); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_lea(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x8D) { // LEA reg,reg/mem - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_lea(ctx,0,mod,reg,rm); - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_lea(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x8D) { // LEA reg,reg/mem - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,1,0,mod,reg,rm,op1_tmp,op2_tmp); - - sprintf(buf,"LEA %s,%s",op2_tmp,op1_tmp); // for this instruction either way works - return 1; - } - - return 0; -} - -sx86_sword op_bound16(softx86_ctx* ctx,sx86_sword idx,sx86_sword upper,sx86_sword lower) -{ - if (idx >= lower && idx <= (upper+2)) { - /* everything is fine */ - return lower; - } - else { - /* reset instruction pointer */ - softx86_set_near_instruction_ptr(ctx,ctx->state->reg_ip_exec_initial); - /* signal BOUNDs exception */ - softx86_int_sw_signal(ctx,5); - } - - return lower; -} - -sx86_sdword op_bound32(softx86_ctx* ctx,sx86_sdword idx,sx86_sdword upper,sx86_sdword lower) -{ - if (idx >= lower && idx <= (upper+4)) { - /* everything is fine */ - return lower; - } - else { - /* reset instruction pointer */ - softx86_set_near_instruction_ptr(ctx,ctx->state->reg_ip_exec_initial); - /* signal BOUNDs exception */ - softx86_int_sw_signal(ctx,5); - } - - return lower; -} - -/* TODO: I get the impression that the BOUNDs instruction was not - part of the original 8086 instruction set. When was it added? */ -int Sfx86OpcodeExec_bound(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x62 && ctx->__private->level >= SX86_CPULEVEL_8086) { // BOUND reg,mem - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_far_ro3(ctx,0,mod,reg,rm,op_bound16,op_bound32); - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_bound(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x62 && ctx->__private->level >= SX86_CPULEVEL_8086) { // BOUND reg,mem - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,1,0,mod,reg,rm,op1_tmp,op2_tmp); - - sprintf(buf,"BOUND %s,%s",op2_tmp,op1_tmp); // for this instruction either way works - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/binops.h b/lib/3rdparty/softx86/softx86/binops.h deleted file mode 100644 index 9dd40a32bda..00000000000 --- a/lib/3rdparty/softx86/softx86/binops.h +++ /dev/null @@ -1,109 +0,0 @@ - -sx86_ubyte op_shl8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_shl16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_shl32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_shl1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_shl1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_shl1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_shl_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_shl_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_shl_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_shr8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_shr16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_shr32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_shr1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_shr1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_shr1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_shr_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_shr_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_shr_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_sar8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_sar16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_sar32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_sar1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_sar1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_sar1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_sar_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_sar_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_sar_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_rol8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_rol16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_rol32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_rol1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_rol1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_rol1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_rol_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_rol_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_rol_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_ror8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_ror16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_ror32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_ror1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_ror1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_ror1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_ror_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_ror_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_ror_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_rcl8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_rcl16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_rcl32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_rcl1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_rcl1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_rcl1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_rcl_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_rcl_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_rcl_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_rcr8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_rcr16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_rcr32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_rcr1_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_rcr1_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_rcr1_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_rcr_cl_8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_rcr_cl_16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_rcr_cl_32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_or8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_or16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_or32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_xor8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_xor16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_xor32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_and8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_and16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_and32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_test8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_test16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_test32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); -sx86_ubyte op_not8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_not16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_not32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_neg8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_neg16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_neg32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_mul8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_mul16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_mul32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_imul8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_imul16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_imul32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_div8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_div16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_div32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_idiv8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_idiv16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_idiv32(softx86_ctx* ctx,sx86_udword src); - -int Sfx86OpcodeExec_or(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_or(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_xor(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_xor(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_and(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_and(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_test(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_test(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_xchg(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_xchg(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_lea(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_lea(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_bound(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_bound(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/cbw.c b/lib/3rdparty/softx86/softx86/cbw.c deleted file mode 100644 index e13cc92df26..00000000000 --- a/lib/3rdparty/softx86/softx86/cbw.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * cbw.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for CBW/CWDE/CWD/CDQ instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "cbw.h" - -int Sfx86OpcodeExec_cxex(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x98) { // CBW/CWDE - if (ctx->state->general_reg[SX86_REG_AX].b.lo & 0x80) ctx->state->general_reg[SX86_REG_AX].w.lo |= 0xFF00; - else ctx->state->general_reg[SX86_REG_AX].b.hi = 0x00; - - return 1; - } - - if (opcode == 0x99) { // CWD/CDQ - if (ctx->state->general_reg[SX86_REG_AX].w.lo & 0x8000) ctx->state->general_reg[SX86_REG_DX].w.lo = 0xFFFF; - else ctx->state->general_reg[SX86_REG_DX].w.lo = 0x0000; - - return 1; - } - - - return 0; -} - -int Sfx86OpcodeDec_cxex(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x98) { // CBW/CWDE - strcpy(buf,"CBW"); - return 1; - } - - if (opcode == 0x99) { // CWD/CDQ - strcpy(buf,"CWD"); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/cbw.h b/lib/3rdparty/softx86/softx86/cbw.h deleted file mode 100644 index 459e85c0628..00000000000 --- a/lib/3rdparty/softx86/softx86/cbw.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_cxex(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_cxex(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/clc.c b/lib/3rdparty/softx86/softx86/clc.c deleted file mode 100644 index c5a2c66820f..00000000000 --- a/lib/3rdparty/softx86/softx86/clc.c +++ /dev/null @@ -1,110 +0,0 @@ -/* - * clc.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for CLC/CLD/CLI/CMC/STC/STD/STI instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "clc.h" -#include "drooling_duh.h" - -int Sfx86OpcodeExec_clx(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0xF5) { // CMC - ctx->state->reg_flags.val ^= SX86_CPUFLAG_CARRY; - return 1; - } - - if (opcode == 0xF8) { // CLC - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_CARRY; - return 1; - } - - if (opcode == 0xF9) { // STC - ctx->state->reg_flags.val |= SX86_CPUFLAG_CARRY; - return 1; - } - - if (opcode == 0xFA) { // CLI - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_INTENABLE; - return 1; - } - - if (opcode == 0xFB) { // STI - ctx->state->reg_flags.val |= SX86_CPUFLAG_INTENABLE; - return 1; - } - - if (opcode == 0xFC) { // CLD - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_DIRECTIONREV; - return 1; - } - - if (opcode == 0xFD) { // STD - ctx->state->reg_flags.val |= SX86_CPUFLAG_DIRECTIONREV; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_clx(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xF5) { // CMC - strcpy(buf,"CMC"); - return 1; - } - - if (opcode == 0xF8) { // CLC - strcpy(buf,"CLC"); - return 1; - } - - if (opcode == 0xF9) { // STC - strcpy(buf,"STC"); - return 1; - } - - if (opcode == 0xFA) { // CLI - strcpy(buf,"CLI"); - return 1; - } - - if (opcode == 0xFB) { // STI - strcpy(buf,"STI"); - return 1; - } - - if (opcode == 0xFC) { // CLD - strcpy(buf,"CLD"); - return 1; - } - - if (opcode == 0xFD) { // STD - strcpy(buf,"STD"); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/clc.h b/lib/3rdparty/softx86/softx86/clc.h deleted file mode 100644 index f436a654db3..00000000000 --- a/lib/3rdparty/softx86/softx86/clc.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_clx(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_clx(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/drooling_duh.c b/lib/3rdparty/softx86/softx86/drooling_duh.c deleted file mode 100644 index d761aa88096..00000000000 --- a/lib/3rdparty/softx86/softx86/drooling_duh.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * drooling_duh.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for HLT/WAIT instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "drooling_duh.h" - -int Sfx86OpcodeExec_duhhh(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x9B) { // WAIT - return 1; - } - if (opcode == 0xF4) { // HLT -/* if an external interrupt pending, proceed */ - if (ctx->state->int_hw_flag || ctx->state->int_nmi) - return 1; -/* else, do not proceed */ - else - return 3; - } - - return 0; -} - -int Sfx86OpcodeDec_duhhh(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x9B) { // WAIT - strcpy(buf,"WAIT"); - return 1; - } - if (opcode == 0xF4) { // HLT - strcpy(buf,"HLT"); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/drooling_duh.h b/lib/3rdparty/softx86/softx86/drooling_duh.h deleted file mode 100644 index 5a235f8eec0..00000000000 --- a/lib/3rdparty/softx86/softx86/drooling_duh.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_duhhh(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_duhhh(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/fpu.c b/lib/3rdparty/softx86/softx86/fpu.c deleted file mode 100644 index 7eee1e16838..00000000000 --- a/lib/3rdparty/softx86/softx86/fpu.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * fpu.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Handles 80x87 FPU opcodes by passing them down through callbacks - * set up in application. - * - * The idea behind this is to handle these opcodes the same way the - * 8086, 80286, 80386, and some 80486s handled them by passing them - * off to an optional external FPU (possibly provided by another - * library similar to this). - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "fpu.h" - -int Sfx86OpcodeExec_fpuhandoff(sx86_ubyte opcode,softx86_ctx* ctx) -{ - return ctx->callbacks->on_fpu_opcode_exec(ctx,ctx->ref_softx87_ctx,opcode); -} - -int Sfx86OpcodeDec_fpuhandoff(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - return ctx->callbacks->on_fpu_opcode_dec(ctx,ctx->ref_softx87_ctx,opcode,buf); -} diff --git a/lib/3rdparty/softx86/softx86/fpu.h b/lib/3rdparty/softx86/softx86/fpu.h deleted file mode 100644 index df47198bbc2..00000000000 --- a/lib/3rdparty/softx86/softx86/fpu.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_fpuhandoff(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_fpuhandoff(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/groupies.c b/lib/3rdparty/softx86/softx86/groupies.c deleted file mode 100644 index 11f72bd0c80..00000000000 --- a/lib/3rdparty/softx86/softx86/groupies.c +++ /dev/null @@ -1,764 +0,0 @@ -/* - * groupies.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for instruction opcodes grouped by a common - * opcode and specified by the reg portion of the mod/reg/rm byte. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "groupies.h" -#include "optable.h" -#include "binops.h" -#include "add.h" -#include "mov.h" -#include "inc.h" - -sx86_uword op_ncall16(softx86_ctx* ctx,sx86_uword src) -{ - softx86_stack_pushw(ctx,ctx->state->reg_ip); - softx86_set_near_instruction_ptr(ctx,src); - return src; -} - -sx86_udword op_ncall32(softx86_ctx* ctx,sx86_udword src) -{ - softx86_stack_pushw(ctx,(ctx->state->reg_ip>>16)&0xFFFF); - softx86_stack_pushw(ctx,ctx->state->reg_ip&0xFFFF); - softx86_set_near_instruction_ptr(ctx,src); - return src; -} - -sx86_uword op_popmem16(softx86_ctx* ctx) -{ - return softx86_stack_popw(ctx); -} - -sx86_udword op_popmem32(softx86_ctx* ctx) -{ - sx86_udword d; - - d = ((sx86_udword)softx86_stack_popw(ctx)); - d |= ((sx86_udword)softx86_stack_popw(ctx))<<16; - return d; -} - -sx86_uword op_pushmem16(softx86_ctx* ctx,sx86_uword src) -{ - softx86_stack_pushw(ctx,src); - return src; -} - -sx86_udword op_pushmem32(softx86_ctx* ctx,sx86_udword src) -{ - softx86_stack_pushw(ctx,(src>>16)&0xFFFF); - softx86_stack_pushw(ctx,src&0xFFFF); - return src; -} - -sx86_uword op_njmp16(softx86_ctx* ctx,sx86_uword src) -{ - softx86_set_near_instruction_ptr(ctx,src); - return src; -} - -sx86_udword op_njmp32(softx86_ctx* ctx,sx86_udword src) -{ - softx86_set_near_instruction_ptr(ctx,src); - return src; -} - -void op_fcall16(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs) -{ - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - softx86_stack_pushw(ctx,ctx->state->reg_ip); - softx86_set_instruction_ptr(ctx,seg,ofs); -} - -void op_fcall32(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs) -{ - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - softx86_stack_pushw(ctx,ctx->state->reg_ip&0xFFFF); - softx86_stack_pushw(ctx,(ctx->state->reg_ip>>16)&0xFFFF); - softx86_set_instruction_ptr(ctx,seg,ofs); -} - -void op_fjmp16(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs) -{ - softx86_set_instruction_ptr(ctx,seg,ofs); -} - -void op_fjmp32(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs) -{ - softx86_set_instruction_ptr(ctx,seg,ofs); -} - -int Sfx86OpcodeExec_group80(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFC) == 0x80) { - sx86_ubyte x; - sx86_ubyte w16,sx; - sx86_ubyte mod,reg,rm; - sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); - sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val); - sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val); - - w16 = opcode&1; - sx = (opcode>>1)&1; - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - op8 = op_add8; - op16 = op_add16; - op32 = op_add32; - } - else if (reg == 1) { - op8 = op_or8; - op16 = op_or16; - op32 = op_or32; - } - else if (reg == 2) { - op8 = op_adc8; - op16 = op_adc16; - op32 = op_adc32; - } - else if (reg == 3) { - op8 = op_sbb8; - op16 = op_sbb16; - op32 = op_sbb32; - } - else if (reg == 4) { - op8 = op_and8; - op16 = op_and16; - op32 = op_and32; - } - else if (reg == 5) { - op8 = op_sub8; - op16 = op_sub16; - op32 = op_sub32; - } - else if (reg == 6) { - op8 = op_xor8; - op16 = op_xor16; - op32 = op_xor32; - } - else if (reg == 7) { - op8 = op_sub8; /* CMP is like SUB except that the result */ - op16 = op_sub16; /* ends up in a temporary register, leaving */ - op32 = op_sub32; /* the original data untouched. */ - } - else { - return 0; - } - - if (reg == 7) /* CMP doesn't modify the dest. register... */ - sx86_exec_full_modrmonly_ro_imm(ctx,w16,0,mod,rm,op8,op16,op32,sx); - else - sx86_exec_full_modrmonly_rw_imm(ctx,w16,0,mod,rm,op8,op16,op32,sx); - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_group80(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x80) { - sx86_ubyte x; - sx86_ubyte w16,sx; - sx86_ubyte mod,reg,rm; - sx86_uword imm16; - - w16 = opcode&1; - sx = (opcode>>1)&1; - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - imm16 = softx86_fetch_dec_byte(ctx); - if (w16) - { - if (sx) - imm16 |= (imm16&0x80) ? 0xFF80 : 0; - else - imm16 |= softx86_fetch_dec_byte(ctx)<<8; - } - - if (reg == 0) sprintf(buf,"ADD %s,%04Xh",op1_tmp,imm16); - else if (reg == 1) sprintf(buf,"OR %s,%04Xh",op1_tmp,imm16); - else if (reg == 2) sprintf(buf,"ADC %s,%04Xh",op1_tmp,imm16); - else if (reg == 3) sprintf(buf,"SBB %s,%04Xh",op1_tmp,imm16); - else if (reg == 4) sprintf(buf,"AND %s,%04Xh",op1_tmp,imm16); - else if (reg == 5) sprintf(buf,"SUB %s,%04Xh",op1_tmp,imm16); - else if (reg == 6) sprintf(buf,"XOR %s,%04Xh",op1_tmp,imm16); - else if (reg == 7) sprintf(buf,"CMP %s,%04Xh",op1_tmp,imm16); - else return 0; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_groupC0(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0xC0) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); - sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val); - sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val); - - w16 = (opcode&1); - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - op8 = op_rol8; - op16 = op_rol16; - op32 = op_rol32; - } - else if (reg == 1) { - op8 = op_ror8; - op16 = op_ror16; - op32 = op_ror32; - } - else if (reg == 2) { - op8 = op_rcl8; - op16 = op_rcl16; - op32 = op_rcl32; - } - else if (reg == 3) { - op8 = op_rcr8; - op16 = op_rcr16; - op32 = op_rcr32; - } - else if (reg == 4) { - op8 = op_shl8; - op16 = op_shl16; - op32 = op_shl32; - } - else if (reg == 5) { - op8 = op_shr8; - op16 = op_shr16; - op32 = op_shr32; - } - else if (reg == 7) { - op8 = op_sar8; - op16 = op_sar16; - op32 = op_sar32; - } - else { - return 0; - } - - sx86_exec_full_modrmonly_rw_imm8(ctx,w16,0,mod,rm,op8,op16,op32); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_groupC0(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0xC0) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_uword imm16; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - imm16 = softx86_fetch_dec_byte(ctx); - - if (reg == 0) sprintf(buf,"ROL %s,%04Xh",op1_tmp,imm16); - else if (reg == 1) sprintf(buf,"ROR %s,%04Xh",op1_tmp,imm16); - else if (reg == 2) sprintf(buf,"RCL %s,%04Xh",op1_tmp,imm16); - else if (reg == 3) sprintf(buf,"RCR %s,%04Xh",op1_tmp,imm16); - else if (reg == 4) sprintf(buf,"SHL %s,%04Xh",op1_tmp,imm16); - else if (reg == 5) sprintf(buf,"SHR %s,%04Xh",op1_tmp,imm16); - else if (reg == 7) sprintf(buf,"SAR %s,%04Xh",op1_tmp,imm16); - else return 0; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_groupD0(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0xD0 || (opcode&0xFE) == 0xD2) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src); - sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src); - sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src); - - w16 = (opcode&1); - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_rol_cl_8; - op16 = op_rol_cl_16; - op32 = op_rol_cl_32; - } - else { - op8 = op_rol1_8; - op16 = op_rol1_16; - op32 = op_rol1_32; - } - } - else if (reg == 1) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_ror_cl_8; - op16 = op_ror_cl_16; - op32 = op_ror_cl_32; - } - else { - op8 = op_ror1_8; - op16 = op_ror1_16; - op32 = op_ror1_32; - } - } - else if (reg == 2) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_rcl_cl_8; - op16 = op_rcl_cl_16; - op32 = op_rcl_cl_32; - } - else { - op8 = op_rcl1_8; - op16 = op_rcl1_16; - op32 = op_rcl1_32; - } - } - else if (reg == 3) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_rcr_cl_8; - op16 = op_rcr_cl_16; - op32 = op_rcr_cl_32; - } - else { - op8 = op_rcr1_8; - op16 = op_rcr1_16; - op32 = op_rcr1_32; - } - } - else if (reg == 4) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_shl_cl_8; - op16 = op_shl_cl_16; - op32 = op_shl_cl_32; - } - else { - op8 = op_shl1_8; - op16 = op_shl1_16; - op32 = op_shl1_32; - } - } - else if (reg == 5) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_shr_cl_8; - op16 = op_shr_cl_16; - op32 = op_shr_cl_32; - } - else { - op8 = op_shr1_8; - op16 = op_shr1_16; - op32 = op_shr1_32; - } - } - else if (reg == 7) { - if ((opcode&0xFE) == 0xD2) { - op8 = op_sar_cl_8; - op16 = op_sar_cl_16; - op32 = op_sar_cl_32; - } - else { - op8 = op_sar1_8; - op16 = op_sar1_16; - op32 = op_sar1_32; - } - } - else { - return 0; - } - - sx86_exec_full_modrmonly_rw(ctx,w16,0,mod,rm,op8,op16,op32); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_groupD0(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0xD0 || (opcode&0xFE) == 0xD2) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - if ((opcode&0xFE) == 0xD2) { - if (reg == 0) sprintf(buf,"ROL %s,CL",op1_tmp); - else if (reg == 1) sprintf(buf,"ROR %s,CL",op1_tmp); - else if (reg == 2) sprintf(buf,"RCL %s,CL",op1_tmp); - else if (reg == 3) sprintf(buf,"RCR %s,CL",op1_tmp); - else if (reg == 4) sprintf(buf,"SHL %s,CL",op1_tmp); - else if (reg == 5) sprintf(buf,"SHR %s,CL",op1_tmp); - else if (reg == 7) sprintf(buf,"SAR %s,CL",op1_tmp); - else return 0; - } - else { - if (reg == 0) sprintf(buf,"ROL %s,1",op1_tmp); - else if (reg == 1) sprintf(buf,"ROR %s,1",op1_tmp); - else if (reg == 2) sprintf(buf,"RCL %s,1",op1_tmp); - else if (reg == 3) sprintf(buf,"RCR %s,1",op1_tmp); - else if (reg == 4) sprintf(buf,"SHL %s,1",op1_tmp); - else if (reg == 5) sprintf(buf,"SHR %s,1",op1_tmp); - else if (reg == 7) sprintf(buf,"SAR %s,1",op1_tmp); - else return 0; - } - - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_groupC6(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0xC6) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); - sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val); - sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val); - - w16 = (opcode&1); - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - op8 = op_mov8; - op16 = op_mov16; - op32 = op_mov32; - } - else { - return 0; - } - - sx86_exec_full_modrmonly_rw_imm(ctx,w16,0,mod,rm,op8,op16,op32,0); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_groupC6(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0xC6) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_uword imm16; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - imm16 = softx86_fetch_dec_byte(ctx); - if (w16) imm16 |= softx86_fetch_dec_byte(ctx)<<8; - - if (reg == 0) sprintf(buf,"MOV %s,%04Xh",op1_tmp,imm16); - else return 0; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_groupFE(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0xFE) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - sx86_exec_full_modrmonly_rw(ctx,w16,0,mod,rm,op_inc8,op_inc16,op_inc32); - } - else if (reg == 1) { - sx86_exec_full_modrmonly_rw(ctx,w16,0,mod,rm,op_dec8,op_dec16,op_dec32); - } - else if (reg >= 2) { - if (!w16) return 0; - - if (reg == 3 || reg == 5) { - void (*op16)(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs); - void (*op32)(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs); - - /* you cannot have a far address in registers */ - if (mod == 3) - return 0; - - if (reg == 3) { - op16 = op_fcall16; - op32 = op_fcall32; - } - else if (reg == 5) { - op16 = op_fjmp16; - op32 = op_fjmp32; - } - - sx86_exec_full_modrmonly_callfar(ctx,0,mod,rm,op16,op32); - } - else { - sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src); - sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src); - - if (reg == 2) { - op16 = op_ncall16; - op32 = op_ncall32; - } - else if (reg == 4) { - op16 = op_njmp16; - op32 = op_njmp32; - } - else if (reg == 6) { - op16 = op_pushmem16; - op32 = op_pushmem32; - } - else { - return 0; - } - - sx86_exec_full_modrmonly_ro(ctx,1,0,mod,rm,NULL,op16,op32); - } - } - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_groupFE(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0xFE) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - if (reg == 0) sprintf(buf,"INC %s",op1_tmp); - else if (reg == 1) sprintf(buf,"DEC %s",op1_tmp); - else { - if (!w16) - return 0; - if (reg == 2) - sprintf(buf,"CALL %s",op1_tmp); - else if (reg == 3) - sprintf(buf,"CALL FAR %s",op1_tmp); - else if (reg == 4) - sprintf(buf,"JMP %s",op1_tmp); - else if (reg == 5) - sprintf(buf,"JMP FAR %s",op1_tmp); - else if (reg == 6) - sprintf(buf,"PUSH %s",op1_tmp); - else - return 0; - } - - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_group8F(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x8F) { - sx86_ubyte x,mod,reg,rm; - sx86_uword (*op16)(softx86_ctx* ctx); - sx86_udword (*op32)(softx86_ctx* ctx); - - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - op16 = op_popmem16; - op32 = op_popmem32; - } - else { - return 0; - } - - sx86_exec_full_modrmonly_wo(ctx,1,0,mod,rm,NULL,op16,op32); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_group8F(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x8F) { - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,1,0,mod,rm,op1_tmp); - - if (reg == 0) sprintf(buf,"POP %s",op1_tmp); - else return 0; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_groupF6(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0xF6) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src); - sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src); - sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src); - - w16 = (opcode&1); - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 0) { - /* taken care of later */ - } - else if (reg == 2) { - /* taken care of later */ - } - else if (reg == 3) { - /* taken care of later */ - } - else if (reg == 4) { - op8 = op_mul8; - op16 = op_mul16; - op32 = op_mul32; - } - else if (reg == 5) { - op8 = op_imul8; - op16 = op_imul16; - op32 = op_imul32; - } - else if (reg == 6) { - op8 = op_div8; - op16 = op_div16; - op32 = op_div32; - } - else if (reg == 7) { - op8 = op_idiv8; /* CMP is like SUB except that the result */ - op16 = op_idiv16; /* ends up in a temporary register, leaving */ - op32 = op_idiv32; /* the original data untouched. */ - } - else { - return 0; - } - -/* TEST does not modify the dest. register... */ - if (reg == 0) - sx86_exec_full_modrmonly_ro_imm(ctx,w16,0,mod,rm,op_test8,op_test16,op_test32,0); -/* NOT and NEG only have one operand */ - else if (reg == 2) - sx86_exec_full_modrmonly_rw(ctx,w16,0,mod,rm,op_not8,op_not16,op_not32); - else if (reg == 3) - sx86_exec_full_modrmonly_rw(ctx,w16,0,mod,rm,op_neg8,op_neg16,op_neg32); -/* everybody else (MUL/IMUL/DIV/IDIV) has one operand but modifies (E)AX */ - else - sx86_exec_full_modrmonly_ro(ctx,w16,0,mod,rm,op8,op16,op32); - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_groupF6(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0xF6) { - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - sx86_uword imm16; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - if (reg == 0) { - imm16 = softx86_fetch_dec_byte(ctx); - if (w16) imm16 |= softx86_fetch_dec_byte(ctx)<<8; - } - - if (reg == 0) sprintf(buf,"TEST %s,%04Xh",op1_tmp,imm16); - else if (reg == 2) sprintf(buf,"NOT %s",op1_tmp); - else if (reg == 3) sprintf(buf,"NEG %s",op1_tmp); - else if (reg == 4) sprintf(buf,"MUL %s",op1_tmp); - else if (reg == 5) sprintf(buf,"IMUL %s",op1_tmp); - else if (reg == 6) sprintf(buf,"DIV %s",op1_tmp); - else if (reg == 7) sprintf(buf,"IDIV %s",op1_tmp); - else return 0; - - return 1; - } - - return 0; -} - diff --git a/lib/3rdparty/softx86/softx86/groupies.h b/lib/3rdparty/softx86/softx86/groupies.h deleted file mode 100644 index 444987d54d6..00000000000 --- a/lib/3rdparty/softx86/softx86/groupies.h +++ /dev/null @@ -1,15 +0,0 @@ - -int Sfx86OpcodeExec_group80(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_group80(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_group8F(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_group8F(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_groupC0(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_groupC0(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_groupC6(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_groupC6(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_groupD0(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_groupD0(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_groupF6(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_groupF6(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_groupFE(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_groupFE(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/inc.c b/lib/3rdparty/softx86/softx86/inc.c deleted file mode 100644 index 39d0df73c89..00000000000 --- a/lib/3rdparty/softx86/softx86/inc.c +++ /dev/null @@ -1,301 +0,0 @@ -/* - * inc.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for the INC/DEC instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "inc.h" - -sx86_ubyte op_dec8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_ubyte ret; - -/* peform the subtraction */ - ret = src-1; - -/* apparently CF is not touched by this instruction */ - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause carry. */ - if ((src&0xF) < 1) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_dec16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_uword ret; - -/* peform the subtraction */ - ret = src-1; - -/* apparently CF is not touched by this instruction */ - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause carry. */ - if ((src&0xF) < 1) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_dec32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_udword ret; - -/* peform the subtraction */ - ret = src-1; - -/* apparently CF is not touched by this instruction */ - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a - b = c, ((a AND 0Fh) - (b AND 0Fh) < 0). - in other words, if the lowest nibbles subtracted cause carry. */ - if ((src&0xF) < 1) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_ubyte op_inc8(softx86_ctx* ctx,sx86_ubyte src) -{ - sx86_ubyte ret; - -/* peform the addition */ - ret = src+1; - -/* apparently CF is not touched by this instruction */ - -/* if result treated as signed value is negative */ - if (ret & 0x80) ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if ((1+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity8(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_uword op_inc16(softx86_ctx* ctx,sx86_uword src) -{ - sx86_uword ret; - -/* peform the addition */ - ret = src+1; - -/* apparently CF is not touched by this instruction */ - -/* if result treated as signed value is negative */ - if (ret & 0x8000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if ((1+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -sx86_udword op_inc32(softx86_ctx* ctx,sx86_udword src) -{ - sx86_udword ret; - -/* peform the addition */ - ret = src+1; - -/* apparently CF is not touched by this instruction */ - -/* if result treated as signed value is negative */ - if (ret & 0x80000000) - ctx->state->reg_flags.val |= SX86_CPUFLAG_SIGN; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_SIGN; - -/* if result is zero */ - if (!ret) ctx->state->reg_flags.val |= SX86_CPUFLAG_ZERO; - else ctx->state->reg_flags.val &= ~SX86_CPUFLAG_ZERO; - -/* auxiliary flag emulation (not defined by Intel's documentation, but observed - from many trials in DEBUG on an old Pentium Pro 166MHz I have kickin' around - as a web server :) - - apparently aux is set if: - given operation a + b = c, ((b AND 0Fh) + (a AND 0Fh) >= 0x10). - in other words, if the lowest nibbles added together overflow. */ - if ((1+(src&0xF)) >= 0x10) - ctx->state->reg_flags.val |= SX86_CPUFLAG_AUX; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_AUX; - -/* finally, compute parity for parity bit */ - if (softx86_parity16(ret)) - ctx->state->reg_flags.val |= SX86_CPUFLAG_PARITY; - else - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_PARITY; - - return ret; -} - -int Sfx86OpcodeExec_inc(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xF8) == 0x40) { // INC [reg] - sx86_uword w,i; - - i = opcode-0x40; - w = ctx->state->general_reg[i].w.lo; - ctx->state->general_reg[i].w.lo = op_inc16(ctx,w); - return 1; - } - else if ((opcode&0xF8) == 0x48) { // DEC [reg] - sx86_uword w,i; - - i = opcode-0x48; - w = ctx->state->general_reg[i].w.lo; - ctx->state->general_reg[i].w.lo = op_dec16(ctx,w); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_inc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xF8) == 0x40) { // INC [reg] - sprintf(buf,"INC %s",sx86_regs16[opcode-0x40]); - return 1; - } - else if ((opcode&0xF8) == 0x48) { // DEC [reg] - sprintf(buf,"DEC %s",sx86_regs16[opcode-0x48]); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/inc.h b/lib/3rdparty/softx86/softx86/inc.h deleted file mode 100644 index c7f0b633e06..00000000000 --- a/lib/3rdparty/softx86/softx86/inc.h +++ /dev/null @@ -1,10 +0,0 @@ - -int Sfx86OpcodeExec_inc(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_inc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); - -sx86_ubyte op_dec8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_dec16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_dec32(softx86_ctx* ctx,sx86_udword src); -sx86_ubyte op_inc8(softx86_ctx* ctx,sx86_ubyte src); -sx86_uword op_inc16(softx86_ctx* ctx,sx86_uword src); -sx86_udword op_inc32(softx86_ctx* ctx,sx86_udword src); diff --git a/lib/3rdparty/softx86/softx86/interrupts.c b/lib/3rdparty/softx86/softx86/interrupts.c deleted file mode 100644 index 1c99462d4a0..00000000000 --- a/lib/3rdparty/softx86/softx86/interrupts.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * interrupts.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for the INT instruction. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "interrupts.h" - -int Sfx86OpcodeExec_int(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0xCC) { // INT 3 - softx86_int_sw_signal(ctx,3); - return 1; - } - else if (opcode == 0xCD) { // INT n - sx86_ubyte i; - - i = softx86_fetch_exec_byte(ctx); - softx86_int_sw_signal(ctx,i); - - return 1; - } - else if (opcode == 0xCE) { // INTO - if (ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW) { - softx86_int_sw_signal(ctx,4); - } - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_int(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xCC) { // INT 3 - strcpy(buf,"INT 3"); - return 1; - } - else if (opcode == 0xCD) { // INT n - sx86_ubyte i; - - i = softx86_fetch_dec_byte(ctx); - sprintf(buf,"INT %02Xh",i); - return 1; - } - else if (opcode == 0xCE) { // INTO - strcpy(buf,"INTO"); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/interrupts.h b/lib/3rdparty/softx86/softx86/interrupts.h deleted file mode 100644 index 113ae83b1c3..00000000000 --- a/lib/3rdparty/softx86/softx86/interrupts.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_int(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_int(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/ioport.c b/lib/3rdparty/softx86/softx86/ioport.c deleted file mode 100644 index d09b07b06ff..00000000000 --- a/lib/3rdparty/softx86/softx86/ioport.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * ioport.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for IN/OUT instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "ioport.h" - -int Sfx86OpcodeExec_io(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if ((opcode&0xFE) == 0xE4) { // IN AL/AX,imm8 - sx86_ubyte ionum; - sx86_ubyte w16; - -/* TODO: If emulating 386+ and protected/v86 mode check I/O permission bitmap */ - - w16 = (opcode&1); - ionum = softx86_fetch_exec_byte(ctx); // get imm8 - - if (w16) { /* NOTE: It is always assumed that it is in Little Endian */ - sx86_uword rw; - - ctx->callbacks->on_read_io(ctx,ionum,(sx86_ubyte*)(&rw),2); - SWAP_WORD_FROM_LE(rw); - ctx->state->general_reg[SX86_REG_AX].w.lo = rw; - } - else { - sx86_ubyte rb; - - ctx->callbacks->on_read_io(ctx,ionum,(sx86_ubyte*)(&rb),1); - ctx->state->general_reg[SX86_REG_AX].b.lo = rb; - } - - return 1; - } - else if ((opcode&0xFE) == 0xEC) { // IN AL/AX,DX - sx86_ubyte w16; - -/* TODO: If emulating 386+ and protected/v86 mode check I/O permission bitmap */ - - w16 = (opcode&1); - if (w16) { /* NOTE: It is always assumed that it is in Little Endian */ - sx86_uword rw; - - ctx->callbacks->on_read_io(ctx,ctx->state->general_reg[SX86_REG_DX].w.lo,(sx86_ubyte*)(&rw),2); - SWAP_WORD_FROM_LE(rw); - ctx->state->general_reg[SX86_REG_AX].w.lo = rw; - } - else { - sx86_ubyte rb; - - ctx->callbacks->on_read_io(ctx,ctx->state->general_reg[SX86_REG_DX].w.lo,(sx86_ubyte*)(&rb),1); - ctx->state->general_reg[SX86_REG_AX].b.lo = rb; - } - - return 1; - } - else if ((opcode&0xFE) == 0xE6) { // OUT AL/AX,imm8 - sx86_ubyte ionum; - sx86_ubyte w16; - -/* TODO: If emulating 386+ and protected/v86 mode check I/O permission bitmap */ - - w16 = (opcode&1); - ionum = softx86_fetch_exec_byte(ctx); // get imm8 - - if (w16) { /* NOTE: It is always assumed that it is in Little Endian */ - sx86_uword rw; - - rw = ctx->state->general_reg[SX86_REG_AX].w.lo; - SWAP_WORD_TO_LE(rw); - ctx->callbacks->on_write_io(ctx,ionum,(sx86_ubyte*)(&rw),2); - } - else { - sx86_ubyte rb; - - rb = ctx->state->general_reg[SX86_REG_AX].b.lo; - ctx->callbacks->on_write_io(ctx,ionum,(sx86_ubyte*)(&rb),1); - } - - return 1; - } - else if ((opcode&0xFE) == 0xEE) { // OUT AL/AX,DX - sx86_ubyte w16; - -/* TODO: If emulating 386+ and protected/v86 mode check I/O permission bitmap */ - - w16 = (opcode&1); - if (w16) { /* NOTE: It is always assumed that it is in Little Endian */ - sx86_uword rw; - - rw = ctx->state->general_reg[SX86_REG_AX].w.lo; - SWAP_WORD_TO_LE(rw); - ctx->callbacks->on_write_io(ctx,ctx->state->general_reg[SX86_REG_DX].w.lo,(sx86_ubyte*)(&rw),2); - } - else { - sx86_ubyte rb; - - rb = ctx->state->general_reg[SX86_REG_AX].b.lo; - ctx->callbacks->on_write_io(ctx,ctx->state->general_reg[SX86_REG_DX].w.lo,(sx86_ubyte*)(&rb),1); - } - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_io(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFE) == 0xE4) { // IN AL/AX,imm8 - sx86_ubyte ionum; - sx86_ubyte w16; - - w16 = (opcode&1); - ionum = softx86_fetch_dec_byte(ctx); // get imm8 - - sprintf(buf,"IN %s,%02Xh",w16 ? "AX" : "AL",ionum); - return 1; - } - else if ((opcode&0xFE) == 0xEC) { // IN AL/AX,DX - sx86_ubyte w16; - - w16 = (opcode&1); - sprintf(buf,"IN %s,DX",w16 ? "AX" : "AL"); - return 1; - } - else if ((opcode&0xFE) == 0xE6) { // OUT AL/AX,imm8 - sx86_ubyte ionum; - sx86_ubyte w16; - - w16 = (opcode&1); - ionum = softx86_fetch_dec_byte(ctx); // get imm8 - - sprintf(buf,"OUT %02Xh,%s",ionum,w16 ? "AX" : "AL"); - return 1; - } - else if ((opcode&0xFE) == 0xEE) { // OUT AL/AX,DX - sx86_ubyte w16; - - w16 = (opcode&1); - sprintf(buf,"OUT DX,%s",w16 ? "AX" : "AL"); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/ioport.h b/lib/3rdparty/softx86/softx86/ioport.h deleted file mode 100644 index cd9446ce596..00000000000 --- a/lib/3rdparty/softx86/softx86/ioport.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_io(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_io(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/jumpy.c b/lib/3rdparty/softx86/softx86/jumpy.c deleted file mode 100644 index 038ab064b11..00000000000 --- a/lib/3rdparty/softx86/softx86/jumpy.c +++ /dev/null @@ -1,358 +0,0 @@ -/* - * jumpy.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for CALL/J instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "jumpy.h" - -int Sfx86OpcodeExec_jc(sx86_ubyte opcode,softx86_ctx* ctx) -{ - int tf; - sx86_udword rel; - -/* Intel's tendancy to sort the instructions in their documentation alphabetically - by name instead of by opcode tends to distort the fact that all of these - opcodes (except for JCXZ) lie between 0x70 and 0x7F. */ - if (!(opcode == 0xE3 || ((opcode&0xF0) == 0x70))) return 0; - - rel = (sx86_udword)softx86_fetch_exec_byte(ctx); - if (rel & 0x80) rel |= 0xFFFFFF00; - rel += ctx->state->reg_ip; - rel &= 0xFFFF; - -/* JCXZ */ - if (opcode == 0xE3) - tf = (ctx->state->general_reg[SX86_REG_CX].w.lo == 0); -/* JO */ - else if (opcode == 0x70) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW); -/* JNO */ - else if (opcode == 0x71) - tf = !(ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW); -/* JC */ - else if (opcode == 0x72) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY); -/* JNC */ - else if (opcode == 0x73) - tf = !(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY); -/* JZ */ - else if (opcode == 0x74) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); -/* JNZ */ - else if (opcode == 0x75) - tf = !(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); -/* JBE */ - else if (opcode == 0x76) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO) || - (ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY); -/* JA */ - else if (opcode == 0x77) - tf = (!(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO)) && - (!(ctx->state->reg_flags.val & SX86_CPUFLAG_CARRY)); -/* JS */ - else if (opcode == 0x78) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_SIGN); -/* JNS */ - else if (opcode == 0x79) - tf = !(ctx->state->reg_flags.val & SX86_CPUFLAG_SIGN); -/* JP */ - else if (opcode == 0x7A) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_PARITY); -/* JNP */ - else if (opcode == 0x7B) - tf = !(ctx->state->reg_flags.val & SX86_CPUFLAG_PARITY); -/* JL */ - else if (opcode == 0x7C) - tf = (((ctx->state->reg_flags.val & SX86_CPUFLAG_SIGN) ? 1 : 0) != - ((ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW) ? 1 : 0)); -/* JGE */ - else if (opcode == 0x7D) - tf = ((ctx->state->reg_flags.val & SX86_CPUFLAG_SIGN) ? 1 : 0) == - ((ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW) ? 1 : 0); -/* JLE */ - else if (opcode == 0x7E) - tf = (((ctx->state->reg_flags.val & SX86_CPUFLAG_SIGN) ? 1 : 0) != - ((ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW) ? 1 : 0) || - (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO)); -/* JG */ - else if (opcode == 0x7F) - tf = (((ctx->state->reg_flags.val & SX86_CPUFLAG_SIGN) ? 1 : 0) == - ((ctx->state->reg_flags.val & SX86_CPUFLAG_OVERFLOW) ? 1 : 0) && - (!(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO))); -/* should NOT be here !*/ - else - return 0; - -/* if condition met, go! */ - if (tf) - softx86_set_instruction_ptr(ctx,ctx->state->segment_reg[SX86_SREG_CS].val,rel); - - return 1; -} - -int Sfx86OpcodeDec_jc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - sx86_udword rel; - -/* Intel's tendancy to sort the instructions in their documentation alphabetically - by name instead of by opcode tends to distort the fact that all of these - opcodes (except for JCXZ) lie between 0x70 and 0x7F. */ - if (!(opcode == 0xE3 || ((opcode&0xF0) == 0x70))) return 0; - - rel = (sx86_udword)softx86_fetch_dec_byte(ctx); - if (rel & 0x80) rel |= 0xFFFFFF00; - rel += ctx->state->reg_ip_decompiler; - rel &= 0xFFFF; - - if (opcode == 0xE3) - sprintf(buf,"JCXZ %04Xh",rel); - else if (opcode == 0x70) - sprintf(buf,"JO %04Xh",rel); - else if (opcode == 0x71) - sprintf(buf,"JNO %04Xh",rel); - else if (opcode == 0x72) - sprintf(buf,"JC %04Xh",rel); - else if (opcode == 0x73) - sprintf(buf,"JNC %04Xh",rel); - else if (opcode == 0x74) - sprintf(buf,"JZ %04Xh",rel); - else if (opcode == 0x75) - sprintf(buf,"JNZ %04Xh",rel); - else if (opcode == 0x76) - sprintf(buf,"JBE %04Xh",rel); - else if (opcode == 0x77) - sprintf(buf,"JA %04Xh",rel); - else if (opcode == 0x78) - sprintf(buf,"JS %04Xh",rel); - else if (opcode == 0x79) - sprintf(buf,"JNS %04Xh",rel); - else if (opcode == 0x7A) - sprintf(buf,"JP %04Xh",rel); - else if (opcode == 0x7B) - sprintf(buf,"JNP %04Xh",rel); - else if (opcode == 0x7C) - sprintf(buf,"JL %04Xh",rel); - else if (opcode == 0x7D) - sprintf(buf,"JGE %04Xh",rel); - else if (opcode == 0x7E) - sprintf(buf,"JLE %04Xh",rel); - else if (opcode == 0x7F) - sprintf(buf,"JG %04Xh",rel); -/* should NOT be here !*/ - else - return 0; - - return 1; -} - -int Sfx86OpcodeExec_call(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x9A) { // CALL FAR seg:offs - sx86_uword seg,ofs; - - ofs = (sx86_uword)softx86_fetch_exec_byte(ctx); - ofs |= ((sx86_uword)softx86_fetch_exec_byte(ctx))<<8; - seg = (sx86_uword)softx86_fetch_exec_byte(ctx); - seg |= ((sx86_uword)softx86_fetch_exec_byte(ctx))<<8; - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - softx86_stack_pushw(ctx,ctx->state->reg_ip); - softx86_set_instruction_ptr(ctx,seg,ofs); - return 1; - } - else if (opcode == 0xE8) { // CALL rel16 - int ofs; - - ofs = (int)softx86_fetch_exec_byte(ctx); - ofs |= ((int)softx86_fetch_exec_byte(ctx))<<8; - if (ofs & 0x8000) ofs -= 0x10000; - ofs += ctx->state->reg_ip; - ofs &= 0xFFFF; - softx86_stack_pushw(ctx,ctx->state->reg_ip); - softx86_set_near_instruction_ptr(ctx,(sx86_udword)ofs); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_call(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x9A) { // CALL FAR seg:offs - sx86_uword seg,ofs; - - ofs = (sx86_uword)softx86_fetch_dec_byte(ctx); - ofs |= ((sx86_uword)softx86_fetch_dec_byte(ctx))<<8; - seg = (sx86_uword)softx86_fetch_dec_byte(ctx); - seg |= ((sx86_uword)softx86_fetch_dec_byte(ctx))<<8; - sprintf(buf,"CALL FAR %04X:%04X",seg,ofs); - return 1; - } - else if (opcode == 0xE8) { // CALL rel16 - int ofs; - - ofs = (int)softx86_fetch_dec_byte(ctx); - ofs |= ((int)softx86_fetch_dec_byte(ctx))<<8; - if (ofs & 0x8000) ofs -= 0x10000; - ofs += ctx->state->reg_ip_decompiler; - ofs &= 0xFFFF; - sprintf(buf,"CALL %04X",ofs); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_jmp(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0xE9) { // JMP rel16 - int ofs; - - ofs = (int)softx86_fetch_exec_byte(ctx); - ofs |= ((int)softx86_fetch_exec_byte(ctx))<<8; - if (ofs & 0x8000) ofs -= 0x10000; - ofs += ctx->state->reg_ip; - ofs &= 0xFFFF; - softx86_set_near_instruction_ptr(ctx,(sx86_udword)ofs); - return 1; - } - else if (opcode == 0xEA) { // JMP FAR seg:offs - sx86_uword seg,ofs; - - ofs = (sx86_uword)softx86_fetch_exec_byte(ctx); - ofs |= ((sx86_uword)softx86_fetch_exec_byte(ctx))<<8; - seg = (sx86_uword)softx86_fetch_exec_byte(ctx); - seg |= ((sx86_uword)softx86_fetch_exec_byte(ctx))<<8; - softx86_set_instruction_ptr(ctx,seg,ofs); - return 1; - } - else if (opcode == 0xEB) { // JMP rel8 - int ofs; - - ofs = (int)softx86_fetch_exec_byte(ctx); - if (ofs & 0x80) ofs -= 0x100; - ofs += ctx->state->reg_ip; - ofs &= 0xFFFF; - softx86_set_near_instruction_ptr(ctx,(sx86_udword)ofs); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_jmp(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xE9) { // JMP rel16 - int ofs; - - ofs = (int)softx86_fetch_dec_byte(ctx); - ofs |= ((int)softx86_fetch_dec_byte(ctx))<<8; - if (ofs & 0x8000) ofs -= 0x10000; - ofs += ctx->state->reg_ip_decompiler; - ofs &= 0xFFFF; - sprintf(buf,"JMP %04X",ofs); - return 1; - } - else if (opcode == 0xEA) { // JMP FAR seg:offs - sx86_uword seg,ofs; - - ofs = (sx86_uword)softx86_fetch_dec_byte(ctx); - ofs |= ((sx86_uword)softx86_fetch_dec_byte(ctx))<<8; - seg = (sx86_uword)softx86_fetch_dec_byte(ctx); - seg |= ((sx86_uword)softx86_fetch_dec_byte(ctx))<<8; - sprintf(buf,"JMP FAR %04X:%04X",seg,ofs); - return 1; - } - else if (opcode == 0xEB) { // JMP rel8 - int ofs; - - ofs = (int)softx86_fetch_dec_byte(ctx); - if (ofs & 0x80) ofs -= 0x100; - ofs += ctx->state->reg_ip_decompiler; - ofs &= 0xFFFF; - sprintf(buf,"JMP %04X",ofs); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_loop(sx86_ubyte opcode,softx86_ctx* ctx) -{ - int tf; - sx86_udword rel; - - if (opcode < 0xE0 || opcode > 0xE2) return 0; - rel = (sx86_udword)softx86_fetch_exec_byte(ctx); - if (rel & 0x80) rel |= 0xFFFFFF00; - rel += ctx->state->reg_ip; - rel &= 0xFFFF; - - ctx->state->general_reg[SX86_REG_CX].w.lo--; - -/* LOOP */ - if (opcode == 0xE2) - tf = (ctx->state->general_reg[SX86_REG_CX].w.lo != 0); -/* LOOPZ */ - else if (opcode == 0xE1) - tf = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO) && - (ctx->state->general_reg[SX86_REG_CX].w.lo != 0); -/* LOOPNZ */ - else if (opcode == 0xE0) - tf = ((ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO) == 0) && - (ctx->state->general_reg[SX86_REG_CX].w.lo != 0); -/* should NOT be here !*/ - else - return 0; - -/* if condition met, go! */ - if (tf) - softx86_set_instruction_ptr(ctx,ctx->state->segment_reg[SX86_SREG_CS].val,rel); - - return 1; -} - -int Sfx86OpcodeDec_loop(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - sx86_udword rel; - - rel = (sx86_udword)softx86_fetch_dec_byte(ctx); - if (rel & 0x80) rel |= 0xFFFFFF00; - rel += ctx->state->reg_ip_decompiler; - rel &= 0xFFFF; - - if (opcode == 0xE2) - sprintf(buf,"LOOP %04Xh",rel); - else if (opcode == 0xE1) - sprintf(buf,"LOOPZ %04Xh",rel); - else if (opcode == 0xE0) - sprintf(buf,"LOOPNZ %04Xh",rel); -/* should NOT be here !*/ - else - return 0; - - return 1; -} - diff --git a/lib/3rdparty/softx86/softx86/jumpy.h b/lib/3rdparty/softx86/softx86/jumpy.h deleted file mode 100644 index 4e3285d23d1..00000000000 --- a/lib/3rdparty/softx86/softx86/jumpy.h +++ /dev/null @@ -1,9 +0,0 @@ - -int Sfx86OpcodeExec_jc(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_jc(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_call(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_call(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_jmp(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_jmp(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_loop(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_loop(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/mov.c b/lib/3rdparty/softx86/softx86/mov.c deleted file mode 100644 index df42812f3c4..00000000000 --- a/lib/3rdparty/softx86/softx86/mov.c +++ /dev/null @@ -1,385 +0,0 @@ -/* - * add.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for MOV and XLAT instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "mov.h" - -sx86_ubyte op_mov8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val) -{ - return val; -} - -sx86_uword op_mov16(softx86_ctx* ctx,sx86_uword src,sx86_uword val) -{ - return val; -} - -sx86_udword op_mov32(softx86_ctx* ctx,sx86_udword src,sx86_udword val) -{ - return val; -} - -int Sfx86OpcodeExec_mov(sx86_ubyte opcode,softx86_ctx* ctx) -{ - sx86_udword lo; - sx86_uword seg; - - if (!ctx->state->is_segment_override) - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - - if ((opcode&0xFC) == 0x88) { // MOV reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // mov from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_rw(ctx,w16,0,mod,reg, - rm,opswap,op_mov8,op_mov16,op_mov32); - - return 1; - } - else if (opcode == 0x8C || opcode == 0x8E) { // MOV reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte opswap; - sx86_ubyte mod,reg,rm; - - opswap = (opcode&2)>>1; // mov from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modsregrm_rw(ctx,mod,reg,rm,opswap,op_mov16); - - return 1; - } - else if ((opcode&0xFE) == 0xA0) { // MOV AL/AX,[mem] - sx86_uword o; - - o = softx86_fetch_exec_byte(ctx); - o |= softx86_fetch_exec_byte(ctx)<<8; - lo = sx86_far_to_linear(ctx,seg,o); - - if (opcode&1) { - sx86_uword mem; - - softx86_fetch(ctx,NULL,lo,&mem,2); - SWAP_WORD_FROM_LE(mem); - ctx->state->general_reg[SX86_REG_AX].w.lo = mem; - } - else { - sx86_ubyte mem; - - softx86_fetch(ctx,NULL,lo,&mem,1); - ctx->state->general_reg[SX86_REG_AX].b.lo = mem; - } - - return 1; - } - else if ((opcode&0xFE) == 0xA2) { // MOV [mem],AL/AX - sx86_uword o; - - o = softx86_fetch_exec_byte(ctx); - o |= softx86_fetch_exec_byte(ctx)<<8; - lo = sx86_far_to_linear(ctx,seg,o); - - if (opcode&1) { - sx86_uword mem; - - mem = ctx->state->general_reg[SX86_REG_AX].w.lo; - SWAP_WORD_TO_LE(mem); - softx86_write(ctx,NULL,lo,&mem,2); - } - else { - sx86_ubyte mem; - - mem = ctx->state->general_reg[SX86_REG_AX].b.lo; - softx86_write(ctx,NULL,lo,&mem,1); - } - - return 1; - } - else if ((opcode&0xF8) == 0xB0) { // MOV [reg = (opcode-0xB0)],imm8 - sx86_ubyte b; - - b = softx86_fetch_exec_byte(ctx); - *(ctx->__private->ptr_regs_8reg[opcode-0xB0]) = b; - return 1; - } - else if ((opcode&0xF8) == 0xB8) { // MOV [reg = (opcode-0xB8)],imm16 - sx86_uword w; - - w = softx86_fetch_exec_byte(ctx); - w |= softx86_fetch_exec_byte(ctx)<<8; - ctx->state->general_reg[opcode-0xB8].w.lo = w; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_mov(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if ((opcode&0xFC) == 0x88) { // MOV reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte w16,opswap; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - opswap = (opcode&2)>>1; // mov from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,w16,0,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"MOV %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"MOV %s,%s",op1_tmp,op2_tmp); - return 1; - } - else if (opcode == 0x8C || opcode == 0x8E) { // MOV reg,reg/mem or reg/mem,reg - sx86_ubyte x; - sx86_ubyte opswap; - sx86_ubyte mod,reg,rm; - - opswap = (opcode&2)>>1; // mov from reg to r/m UNLESS this bit it set (then it's the other way around) - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modsregrm(ctx,mod,reg,rm,op1_tmp,op2_tmp); - - if (opswap) sprintf(buf,"MOV %s,%s",op2_tmp,op1_tmp); - else sprintf(buf,"MOV %s,%s",op1_tmp,op2_tmp); - return 1; - } - else if ((opcode&0xFE) == 0xA0) { // MOV AL/AX,[mem] - sx86_uword o; - - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(buf,"MOV %s,[%04Xh]",opcode == 0xA1 ? "AX" : "AL",o); - return 1; - } - else if ((opcode&0xFE) == 0xA2) { // MOV [mem],AL/AX - sx86_uword o; - - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(buf,"MOV [%04Xh],%s",o,opcode == 0xA3 ? "AX" : "AL"); - return 1; - } - else if ((opcode&0xF8) == 0xB0) { // MOV [reg = (opcode-0xB0)],imm8 - sx86_ubyte b; - - b = softx86_fetch_dec_byte(ctx); - sprintf(buf,"MOV %s,%02Xh",sx86_regs8[opcode-0xB0],b); - return 1; - } - else if ((opcode&0xF8) == 0xB8) { // MOV [reg = (opcode-0xB8)],imm16 - sx86_uword w; - - w = softx86_fetch_dec_byte(ctx); - w |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(buf,"MOV %s,%04Xh",sx86_regs16[opcode-0xB8],w); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_xlat(sx86_ubyte opcode,softx86_ctx* ctx) -{ - sx86_uword seg; - - if (!ctx->state->is_segment_override) - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - - if (opcode == 0xD7) { // MOV reg,reg/mem or reg/mem,reg - sx86_ubyte d; - sx86_udword ofs; - - ofs = (sx86_udword)(ctx->state->general_reg[SX86_REG_BX].w.lo); - ofs += (sx86_udword)(ctx->state->general_reg[SX86_REG_AX].b.lo); - ofs &= 0xFFFF; - ofs = sx86_far_to_linear(ctx,seg,ofs); - - softx86_fetch(ctx,NULL,ofs,&d,1); - ctx->state->general_reg[SX86_REG_AX].b.lo = d; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_xlat(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xD7) { // XLAT - strcpy(buf,"XLAT"); - return 1; - } - - return 0; -} - -sx86_uword op_les16(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs) -{ - softx86_setsegval(ctx,SX86_SREG_ES,seg); - return ofs; -} - -sx86_udword op_les32(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs) -{ - softx86_setsegval(ctx,SX86_SREG_ES,seg); - return ofs; -} - -sx86_uword op_lds16(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs) -{ - softx86_setsegval(ctx,SX86_SREG_DS,seg); - return ofs; -} - -sx86_udword op_lds32(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs) -{ - softx86_setsegval(ctx,SX86_SREG_DS,seg); - return ofs; -} - -int Sfx86OpcodeExec_les(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0xC4) { // LES - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_far(ctx,0,mod,reg,rm,op_les16,op_les32); - return 1; - } - if (opcode == 0xC5) { // LDS - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_exec_full_modregrm_far(ctx,0,mod,reg,rm,op_lds16,op_lds32); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_les(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xC4) { // LES - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,1,0,mod,reg,rm,op1_tmp,op2_tmp); - sprintf(buf,"LES %s,%s",op2_tmp,op1_tmp); - return 1; - } - if (opcode == 0xC5) { // LDS - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modregrm(ctx,1,0,mod,reg,rm,op1_tmp,op2_tmp); - sprintf(buf,"LDS %s,%s",op2_tmp,op1_tmp); - return 1; - } - - return 0; -} - -sx86_uword op_lmsw16(softx86_ctx* ctx,sx86_uword src) -{ -/* bit 0 can only be set, not reset (80286 method of PM) */ - ctx->state->reg_cr0 |= (src & SX86_CR0FLAG_PE); -/* bits 1-3 are only used here */ - ctx->state->reg_cr0 &= ~SX86_CR0_LMSW_MASK; - ctx->state->reg_cr0 |= (src & SX86_CR0_LMSW_MASK); -/* the return value doesn't matter */ - return 0; -} - -sx86_uword op_smsw16(softx86_ctx* ctx,sx86_uword src) -{ - return ((sx86_uword)ctx->state->reg_cr0); -} - -int Sfx86OpcodeExec_lmsw286(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x01) { // LMSW [reg] - sx86_ubyte x; - sx86_ubyte mod,reg,rm; - - x = softx86_fetch_exec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - - if (reg == 4) - sx86_exec_full_modrmonly_rw(ctx,1,0,mod,rm,NULL,op_smsw16,NULL); - else if (reg == 6) - sx86_exec_full_modrmonly_ro(ctx,1,0,mod,rm,NULL,op_lmsw16,NULL); - else - return 0; - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_lmsw286(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x01) { // LMSW [reg] - sx86_ubyte x; - sx86_ubyte w16; - sx86_ubyte mod,reg,rm; - - w16 = (opcode&1); - x = softx86_fetch_dec_byte(ctx); // fetch mod/reg/rm - sx86_modregrm_unpack(x,mod,reg,rm); - sx86_dec_full_modrmonly(ctx,w16,0,mod,rm,op1_tmp); - - if (reg == 4) - sprintf(buf,"SMSW %s",op1_tmp); - else if (reg == 6) - sprintf(buf,"LMSW %s",op1_tmp); - else - return 0; - - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/mov.h b/lib/3rdparty/softx86/softx86/mov.h deleted file mode 100644 index 7304d85072f..00000000000 --- a/lib/3rdparty/softx86/softx86/mov.h +++ /dev/null @@ -1,14 +0,0 @@ - -int Sfx86OpcodeExec_mov(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_mov(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_xlat(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_xlat(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_les(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_les(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); - -int Sfx86OpcodeExec_lmsw286(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_lmsw286(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); - -sx86_ubyte op_mov8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_mov16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); -sx86_udword op_mov32(softx86_ctx* ctx,sx86_udword src,sx86_udword val); diff --git a/lib/3rdparty/softx86/softx86/optable.c b/lib/3rdparty/softx86/softx86/optable.c deleted file mode 100644 index 426f84ae8ef..00000000000 --- a/lib/3rdparty/softx86/softx86/optable.c +++ /dev/null @@ -1,683 +0,0 @@ -/* - * optable.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Opcode jumptable. - * - * Allows the recognition of many opcodes without having to write approximately - * 500+ if...then...else statements which is a) inefficient and b) apparently can - * cause some compilers such as Microsoft C++ to crash during the compile stage with - * an error. Since it's a table, it can be referred to via a pointer that can be easily - * redirected to other opcode tables (i.e., one for the 8086, one for the 80286, etc.) - * without much hassle. - * - * The table contains two pointers: one for an "execute" function, and one for a - * "decompile" function. The execute function is given the context and the initial opcode. - * If more opcodes are needed the function calls softx86_fetch_exec_byte(). The decode - * function is also given the opcode but also a char[] array where it is expected to - * sprintf() or strcpy() the disassembled output. If that function needs more opcodes - * it calls softx86_fetch_dec_byte(). - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "pushpop.h" -#include "procframe.h" -#include "aaa.h" -#include "add.h" -#include "cbw.h" -#include "clc.h" -#include "drooling_duh.h" -#include "groupies.h" -#include "interrupts.h" -#include "ioport.h" -#include "inc.h" -#include "fpu.h" -#include "mov.h" -#include "prefixes.h" -#include "binops.h" -#include "jumpy.h" -#include "shovel.h" - -/* temporary buffers for decoding instruction parameters */ -char op1_tmp[32]; -char op2_tmp[32]; - -char *sx86_regs8[8] = { - "AL","CL","DL","BL","AH","CH","DH","BH"}; -char *sx86_regs16[8] = { - "AX","CX","DX","BX","SP","BP","SI","DI"}; -char *sx86_regs32[8] = { - "EAX","ECX","EDX","EBX","ESP","EBP","ESI","EDI"}; -char *sx86_regsaddr16_16[8] = { - "BX+SI","BX+DI","BP+SI","BP+DI","SI","DI","BP","BX"}; -char *sx86_segregs[8] = { - "ES","CS","SS","DS","?4","?5","?6","?7"}; - -static int Sfx86OpcodeExec_default(sx86_ubyte opcode,softx86_ctx* ctx) -{ - return 0; -} - -static int Sfx86OpcodeDec_default(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - buf[0]=0; - - return 0; -} - -int Sfx86OpcodeExec_nop(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode != 0x90) return 0; - return 1; -} - -int Sfx86OpcodeDec_nop(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode != 0x90) return 0; - strcpy(buf,"NOP"); - return 1; -} - -Sfx86OpcodeTable optab8086 = { -{ - {Sfx86OpcodeExec_add, Sfx86OpcodeDec_add}, /* 0x00 */ - {Sfx86OpcodeExec_add, Sfx86OpcodeDec_add}, /* 0x01 */ - {Sfx86OpcodeExec_add, Sfx86OpcodeDec_add}, /* 0x02 */ - {Sfx86OpcodeExec_add, Sfx86OpcodeDec_add}, /* 0x03 */ - {Sfx86OpcodeExec_add, Sfx86OpcodeDec_add}, /* 0x04 */ - {Sfx86OpcodeExec_add, Sfx86OpcodeDec_add}, /* 0x05 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x06 */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x07 */ - - {Sfx86OpcodeExec_or, Sfx86OpcodeDec_or}, /* 0x08 */ - {Sfx86OpcodeExec_or, Sfx86OpcodeDec_or}, /* 0x09 */ - {Sfx86OpcodeExec_or, Sfx86OpcodeDec_or}, /* 0x0A */ - {Sfx86OpcodeExec_or, Sfx86OpcodeDec_or}, /* 0x0B */ - {Sfx86OpcodeExec_or, Sfx86OpcodeDec_or}, /* 0x0C */ - {Sfx86OpcodeExec_or, Sfx86OpcodeDec_or}, /* 0x0D */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x0E */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x0F */ - - {Sfx86OpcodeExec_adc, Sfx86OpcodeDec_adc}, /* 0x10 */ - {Sfx86OpcodeExec_adc, Sfx86OpcodeDec_adc}, /* 0x11 */ - {Sfx86OpcodeExec_adc, Sfx86OpcodeDec_adc}, /* 0x12 */ - {Sfx86OpcodeExec_adc, Sfx86OpcodeDec_adc}, /* 0x13 */ - {Sfx86OpcodeExec_adc, Sfx86OpcodeDec_adc}, /* 0x14 */ - {Sfx86OpcodeExec_adc, Sfx86OpcodeDec_adc}, /* 0x15 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x16 */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x17 */ - - {Sfx86OpcodeExec_sbb, Sfx86OpcodeDec_sbb}, /* 0x18 */ - {Sfx86OpcodeExec_sbb, Sfx86OpcodeDec_sbb}, /* 0x19 */ - {Sfx86OpcodeExec_sbb, Sfx86OpcodeDec_sbb}, /* 0x1A */ - {Sfx86OpcodeExec_sbb, Sfx86OpcodeDec_sbb}, /* 0x1B */ - {Sfx86OpcodeExec_sbb, Sfx86OpcodeDec_sbb}, /* 0x1C */ - {Sfx86OpcodeExec_sbb, Sfx86OpcodeDec_sbb}, /* 0x1D */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x1E */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x1F */ - - {Sfx86OpcodeExec_and, Sfx86OpcodeDec_and}, /* 0x20 */ - {Sfx86OpcodeExec_and, Sfx86OpcodeDec_and}, /* 0x21 */ - {Sfx86OpcodeExec_and, Sfx86OpcodeDec_and}, /* 0x22 */ - {Sfx86OpcodeExec_and, Sfx86OpcodeDec_and}, /* 0x23 */ - {Sfx86OpcodeExec_and, Sfx86OpcodeDec_and}, /* 0x24 */ - {Sfx86OpcodeExec_and, Sfx86OpcodeDec_and}, /* 0x25 */ - {Sfx86OpcodeExec_segover, Sfx86OpcodeDec_segover}, /* 0x26 */ - {Sfx86OpcodeExec_aaaseries, Sfx86OpcodeDec_aaaseries}, /* 0x27 */ - - {Sfx86OpcodeExec_sub, Sfx86OpcodeDec_sub}, /* 0x28 */ - {Sfx86OpcodeExec_sub, Sfx86OpcodeDec_sub}, /* 0x29 */ - {Sfx86OpcodeExec_sub, Sfx86OpcodeDec_sub}, /* 0x2A */ - {Sfx86OpcodeExec_sub, Sfx86OpcodeDec_sub}, /* 0x2B */ - {Sfx86OpcodeExec_sub, Sfx86OpcodeDec_sub}, /* 0x2C */ - {Sfx86OpcodeExec_sub, Sfx86OpcodeDec_sub}, /* 0x2D */ - {Sfx86OpcodeExec_segover, Sfx86OpcodeDec_segover}, /* 0x2E */ - {Sfx86OpcodeExec_aaaseries, Sfx86OpcodeDec_aaaseries}, /* 0x2F */ - - {Sfx86OpcodeExec_xor, Sfx86OpcodeDec_xor}, /* 0x30 */ - {Sfx86OpcodeExec_xor, Sfx86OpcodeDec_xor}, /* 0x31 */ - {Sfx86OpcodeExec_xor, Sfx86OpcodeDec_xor}, /* 0x32 */ - {Sfx86OpcodeExec_xor, Sfx86OpcodeDec_xor}, /* 0x33 */ - {Sfx86OpcodeExec_xor, Sfx86OpcodeDec_xor}, /* 0x34 */ - {Sfx86OpcodeExec_xor, Sfx86OpcodeDec_xor}, /* 0x35 */ - {Sfx86OpcodeExec_segover, Sfx86OpcodeDec_segover}, /* 0x36 */ - {Sfx86OpcodeExec_aaaseries, Sfx86OpcodeDec_aaaseries}, /* 0x37 */ - - {Sfx86OpcodeExec_cmp, Sfx86OpcodeDec_cmp}, /* 0x38 */ - {Sfx86OpcodeExec_cmp, Sfx86OpcodeDec_cmp}, /* 0x39 */ - {Sfx86OpcodeExec_cmp, Sfx86OpcodeDec_cmp}, /* 0x3A */ - {Sfx86OpcodeExec_cmp, Sfx86OpcodeDec_cmp}, /* 0x3B */ - {Sfx86OpcodeExec_cmp, Sfx86OpcodeDec_cmp}, /* 0x3C */ - {Sfx86OpcodeExec_cmp, Sfx86OpcodeDec_cmp}, /* 0x3D */ - {Sfx86OpcodeExec_segover, Sfx86OpcodeDec_segover}, /* 0x3E */ - {Sfx86OpcodeExec_aaaseries, Sfx86OpcodeDec_aaaseries}, /* 0x3F */ - - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x40 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x41 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x42 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x43 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x44 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x45 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x46 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x47 */ - - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x48 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x49 */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x4A */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x4B */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x4C */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x4D */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x4E */ - {Sfx86OpcodeExec_inc, Sfx86OpcodeDec_inc}, /* 0x4F */ - - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x50 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x51 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x52 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x53 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x54 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x55 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x56 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x57 */ - - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x58 */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x59 */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x5A */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x5B */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x5C */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x5D */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x5E */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x5F */ - - {Sfx86OpcodeExec_pusha, Sfx86OpcodeDec_pusha}, /* 0x60 */ - {Sfx86OpcodeExec_popa, Sfx86OpcodeDec_popa}, /* 0x61 */ - {Sfx86OpcodeExec_bound, Sfx86OpcodeDec_bound}, /* 0x62 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x63 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x64 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x65 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x66 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x67 */ - - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x68 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x69 */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x6A */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6B */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6C */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6D */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6E */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6F */ - - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x70 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x71 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x72 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x73 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x74 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x75 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x76 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x77 */ - - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x78 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x79 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x7A */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x7B */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x7C */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x7D */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x7E */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0x7F */ - - {Sfx86OpcodeExec_group80, Sfx86OpcodeDec_group80}, /* 0x80 */ - {Sfx86OpcodeExec_group80, Sfx86OpcodeDec_group80}, /* 0x81 */ - {Sfx86OpcodeExec_group80, Sfx86OpcodeDec_group80}, /* 0x82 */ - {Sfx86OpcodeExec_group80, Sfx86OpcodeDec_group80}, /* 0x83 */ - {Sfx86OpcodeExec_test, Sfx86OpcodeDec_test}, /* 0x84 */ - {Sfx86OpcodeExec_test, Sfx86OpcodeDec_test}, /* 0x85 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x86 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x87 */ - - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0x88 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0x89 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0x8A */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0x8B */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0x8C */ - {Sfx86OpcodeExec_lea, Sfx86OpcodeDec_lea}, /* 0x8D */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0x8E */ - {Sfx86OpcodeExec_group8F, Sfx86OpcodeDec_group8F}, /* 0x8F */ - - {Sfx86OpcodeExec_nop, Sfx86OpcodeDec_nop}, /* 0x90 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x91 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x92 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x93 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x94 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x95 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x96 */ - {Sfx86OpcodeExec_xchg, Sfx86OpcodeDec_xchg}, /* 0x97 */ - - {Sfx86OpcodeExec_cxex, Sfx86OpcodeDec_cxex}, /* 0x98 */ - {Sfx86OpcodeExec_cxex, Sfx86OpcodeDec_cxex}, /* 0x99 */ - {Sfx86OpcodeExec_call, Sfx86OpcodeDec_call}, /* 0x9A */ - {Sfx86OpcodeExec_duhhh, Sfx86OpcodeDec_duhhh}, /* 0x9B */ - {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x9C */ - {Sfx86OpcodeExec_pop, Sfx86OpcodeDec_pop}, /* 0x9D */ - {Sfx86OpcodeExec_ahf, Sfx86OpcodeDec_ahf}, /* 0x9E */ - {Sfx86OpcodeExec_ahf, Sfx86OpcodeDec_ahf}, /* 0x9F */ - - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xA0 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xA1 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xA2 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xA3 */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xA4 */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xA5 */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xA6 */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xA7 */ - - {Sfx86OpcodeExec_test, Sfx86OpcodeDec_test}, /* 0xA8 */ - {Sfx86OpcodeExec_test, Sfx86OpcodeDec_test}, /* 0xA9 */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xAA */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xAB */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xAC */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xAD */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xAE */ - {Sfx86OpcodeExec_shovel, Sfx86OpcodeDec_shovel}, /* 0xAF */ - - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB0 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB1 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB2 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB3 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB4 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB5 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB6 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB7 */ - - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB8 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xB9 */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xBA */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xBB */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xBC */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xBD */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xBE */ - {Sfx86OpcodeExec_mov, Sfx86OpcodeDec_mov}, /* 0xBF */ - - {Sfx86OpcodeExec_groupC0, Sfx86OpcodeDec_groupC0}, /* 0xC0 */ - {Sfx86OpcodeExec_groupC0, Sfx86OpcodeDec_groupC0}, /* 0xC1 */ - {Sfx86OpcodeExec_returns, Sfx86OpcodeDec_returns}, /* 0xC2 */ - {Sfx86OpcodeExec_returns, Sfx86OpcodeDec_returns}, /* 0xC3 */ - {Sfx86OpcodeExec_les, Sfx86OpcodeDec_les}, /* 0xC4 */ - {Sfx86OpcodeExec_les, Sfx86OpcodeDec_les}, /* 0xC5 */ - {Sfx86OpcodeExec_groupC6, Sfx86OpcodeDec_groupC6}, /* 0xC6 */ - {Sfx86OpcodeExec_groupC6, Sfx86OpcodeDec_groupC6}, /* 0xC7 */ - - {Sfx86OpcodeExec_enterleave, Sfx86OpcodeDec_enterleave}, /* 0xC8 */ - {Sfx86OpcodeExec_enterleave, Sfx86OpcodeDec_enterleave}, /* 0xC9 */ - {Sfx86OpcodeExec_returns, Sfx86OpcodeDec_returns}, /* 0xCA */ - {Sfx86OpcodeExec_returns, Sfx86OpcodeDec_returns}, /* 0xCB */ - {Sfx86OpcodeExec_int, Sfx86OpcodeDec_int}, /* 0xCC */ - {Sfx86OpcodeExec_int, Sfx86OpcodeDec_int}, /* 0xCD */ - {Sfx86OpcodeExec_int, Sfx86OpcodeDec_int}, /* 0xCE */ - {Sfx86OpcodeExec_returns, Sfx86OpcodeDec_returns}, /* 0xCF */ - - {Sfx86OpcodeExec_groupD0, Sfx86OpcodeDec_groupD0}, /* 0xD0 */ - {Sfx86OpcodeExec_groupD0, Sfx86OpcodeDec_groupD0}, /* 0xD1 */ - {Sfx86OpcodeExec_groupD0, Sfx86OpcodeDec_groupD0}, /* 0xD2 */ - {Sfx86OpcodeExec_groupD0, Sfx86OpcodeDec_groupD0}, /* 0xD3 */ - {Sfx86OpcodeExec_aaaseries, Sfx86OpcodeDec_aaaseries}, /* 0xD4 */ - {Sfx86OpcodeExec_aaaseries, Sfx86OpcodeDec_aaaseries}, /* 0xD5 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0xD6 */ - {Sfx86OpcodeExec_xlat, Sfx86OpcodeDec_xlat}, /* 0xD7 */ - - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xD8 */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xD9 */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xDA */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xDB */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xDC */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xDD */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xDE */ - {Sfx86OpcodeExec_fpuhandoff, Sfx86OpcodeDec_fpuhandoff}, /* 0xDF */ - - {Sfx86OpcodeExec_loop, Sfx86OpcodeDec_loop}, /* 0xE0 */ - {Sfx86OpcodeExec_loop, Sfx86OpcodeDec_loop}, /* 0xE1 */ - {Sfx86OpcodeExec_loop, Sfx86OpcodeDec_loop}, /* 0xE2 */ - {Sfx86OpcodeExec_jc, Sfx86OpcodeDec_jc}, /* 0xE3 */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xE4 */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xE5 */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xE6 */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xE7 */ - - {Sfx86OpcodeExec_call, Sfx86OpcodeDec_call}, /* 0xE8 */ - {Sfx86OpcodeExec_jmp, Sfx86OpcodeDec_jmp}, /* 0xE9 */ - {Sfx86OpcodeExec_jmp, Sfx86OpcodeDec_jmp}, /* 0xEA */ - {Sfx86OpcodeExec_jmp, Sfx86OpcodeDec_jmp}, /* 0xEB */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xEC */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xED */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xEE */ - {Sfx86OpcodeExec_io, Sfx86OpcodeDec_io}, /* 0xEF */ - - {Sfx86OpcodeExec_lock, Sfx86OpcodeDec_lock}, /* 0xF0 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0xF1 */ - {Sfx86OpcodeExec_repetition, Sfx86OpcodeDec_repetition}, /* 0xF2 */ - {Sfx86OpcodeExec_repetition, Sfx86OpcodeDec_repetition}, /* 0xF3 */ - {Sfx86OpcodeExec_duhhh, Sfx86OpcodeDec_duhhh}, /* 0xF4 */ - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xF5 */ - {Sfx86OpcodeExec_groupF6, Sfx86OpcodeDec_groupF6}, /* 0xF6 */ - {Sfx86OpcodeExec_groupF6, Sfx86OpcodeDec_groupF6}, /* 0xF7 */ - - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xF8 */ - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xF9 */ - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xFA */ - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xFB */ - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xFC */ - {Sfx86OpcodeExec_clx, Sfx86OpcodeDec_clx}, /* 0xFD */ - {Sfx86OpcodeExec_groupFE, Sfx86OpcodeDec_groupFE}, /* 0xFE */ - {Sfx86OpcodeExec_groupFE, Sfx86OpcodeDec_groupFE}, /* 0xFF */ -}, -}; - -Sfx86OpcodeTable optab8086_0Fh = { -{ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_lmsw286, Sfx86OpcodeDec_lmsw286}, /* 0x01 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x00 */ -}, -}; diff --git a/lib/3rdparty/softx86/softx86/optable.h b/lib/3rdparty/softx86/softx86/optable.h deleted file mode 100644 index 2eacea25197..00000000000 --- a/lib/3rdparty/softx86/softx86/optable.h +++ /dev/null @@ -1,28 +0,0 @@ - -// return value: -// 0 = opcode not recognized -// 1 = opcode recognized, parsing complete -// 2 = opcode recognized, more parsing needed (i.e., prefix) -typedef int (*Sfx86OpcodeExec)(sx86_ubyte opcode,softx86_ctx* ctx); -typedef int (*Sfx86OpcodeDec)(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); - -typedef struct { - Sfx86OpcodeExec exec; - Sfx86OpcodeDec dec; -} Sfx86Opcode; - -typedef struct { - Sfx86Opcode table[256]; -} Sfx86OpcodeTable; - -extern Sfx86OpcodeTable optab8086; -extern Sfx86OpcodeTable optab8086_0Fh; - -extern char op1_tmp[32]; -extern char op2_tmp[32]; - -extern char* sx86_regs8[8]; -extern char* sx86_regs16[8]; -extern char* sx86_regs32[8]; -extern char* sx86_regsaddr16_16[8]; -extern char* sx86_segregs[8]; diff --git a/lib/3rdparty/softx86/softx86/prefixes.c b/lib/3rdparty/softx86/softx86/prefixes.c deleted file mode 100644 index 30a7a3b6272..00000000000 --- a/lib/3rdparty/softx86/softx86/prefixes.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * prefixes.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for segment override prefixes. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "prefixes.h" - -int Sfx86OpcodeExec_segover(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x26) { // ES: - ctx->state->is_segment_override = 1; - ctx->state->segment_override = ctx->state->segment_reg[SX86_SREG_ES].val; - return 2; - } - if (opcode == 0x2E) { // CS: - ctx->state->is_segment_override = 1; - ctx->state->segment_override = ctx->state->segment_reg[SX86_SREG_CS].val; - return 2; - } - if (opcode == 0x36) { // SS: - ctx->state->is_segment_override = 1; - ctx->state->segment_override = ctx->state->segment_reg[SX86_SREG_SS].val; - return 2; - } - if (opcode == 0x3E) { // DS: - ctx->state->is_segment_override = 1; - ctx->state->segment_override = ctx->state->segment_reg[SX86_SREG_DS].val; - return 2; - } - - return 0; -} - -int Sfx86OpcodeDec_segover(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x26) { // ES: - strcpy(buf,"ES: "); - return 2; - } - if (opcode == 0x2E) { // CS: - strcpy(buf,"CS: "); - return 2; - } - if (opcode == 0x36) { // SS: - strcpy(buf,"SS: "); - return 2; - } - if (opcode == 0x3E) { // DS: - strcpy(buf,"DS: "); - return 2; - } - - return 0; -} - -int Sfx86OpcodeExec_repetition(sx86_ubyte opcode,softx86_ctx* ctx) -{ -// you can't have REP REP MOSVB... -// it's not like "ICE ICE BABY" - if (ctx->state->rep_flag > 0) - return 0; - - if (opcode == 0xF3) { // REP/REPZ - ctx->state->rep_flag=2; - return 2; - } - if (opcode == 0xF2) { // REPNZ - ctx->state->rep_flag=1; - return 2; - } - - return 0; -} - -int Sfx86OpcodeDec_repetition(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xF3) { // REP/REPZ - strcpy(buf,"REP "); - return 2; - } - if (opcode == 0xF2) { // REPNZ - strcpy(buf,"REPNZ "); - return 2; - } - - return 0; -} - -int Sfx86OpcodeExec_lock(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0xF0) { // LOCK - /* TODO: Do something with this... */ - return 2; - } - - return 0; -} - -int Sfx86OpcodeDec_lock(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xF0) { // LOCK - strcpy(buf,"LOCK "); - return 2; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/prefixes.h b/lib/3rdparty/softx86/softx86/prefixes.h deleted file mode 100644 index e0d7ce5dd9e..00000000000 --- a/lib/3rdparty/softx86/softx86/prefixes.h +++ /dev/null @@ -1,7 +0,0 @@ - -int Sfx86OpcodeExec_segover(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_segover(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_repetition(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_repetition(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_lock(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_lock(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/procframe.c b/lib/3rdparty/softx86/softx86/procframe.c deleted file mode 100644 index 0665fd9549f..00000000000 --- a/lib/3rdparty/softx86/softx86/procframe.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * procframe.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for RET/RETF/IRET instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "procframe.h" - -int Sfx86OpcodeExec_returns(sx86_ubyte opcode,softx86_ctx* ctx) -{ - sx86_uword seg,ofs,flg; - - if (opcode == 0xC2) { // RET (near) + pop n bytes - sx86_uword popeye; - - popeye = softx86_fetch_exec_byte(ctx); - popeye |= softx86_fetch_exec_byte(ctx)<<8; - - ofs = softx86_stack_popw(ctx); - softx86_set_near_instruction_ptr(ctx,ofs); - softx86_stack_discard_n(ctx,(int)popeye); - return 1; - } - if (opcode == 0xC3) { // RET (near) - ofs = softx86_stack_popw(ctx); - softx86_set_near_instruction_ptr(ctx,ofs); - return 1; - } - if (opcode == 0xCA) { // RETF (far) + pop n bytes - sx86_uword popeye; - - popeye = softx86_fetch_exec_byte(ctx); - popeye |= softx86_fetch_exec_byte(ctx)<<8; - - ofs = softx86_stack_popw(ctx); - seg = softx86_stack_popw(ctx); - softx86_set_instruction_ptr(ctx,seg,ofs); - softx86_stack_discard_n(ctx,(int)popeye); - return 1; - } - if (opcode == 0xCB) { // RETF (far) - ofs = softx86_stack_popw(ctx); - seg = softx86_stack_popw(ctx); - softx86_set_instruction_ptr(ctx,seg,ofs); - return 1; - } - if (opcode == 0xCF) { // IRET/IRETD - ofs = softx86_stack_popw(ctx); - seg = softx86_stack_popw(ctx); - flg = softx86_stack_popw(ctx); - softx86_set_instruction_ptr(ctx,seg,ofs); - ctx->state->reg_flags.val = flg; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_returns(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xC2) { // RET (near) + pop n bytes - sx86_uword popeye; - popeye = softx86_fetch_dec_byte(ctx); - popeye |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(buf,"RET 0x%02X",popeye); - return 1; - } - if (opcode == 0xC3) { // RET (near) - strcpy(buf,"RET"); - return 1; - } - if (opcode == 0xCA) { // RETF (far) + pop n bytes - sx86_uword popeye; - popeye = softx86_fetch_dec_byte(ctx); - popeye |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(buf,"RETF 0x%02X",popeye); - return 1; - } - if (opcode == 0xCB) { // RETF (far) - strcpy(buf,"RETF"); - return 1; - } - if (opcode == 0xCF) { // IRET/IRETD - strcpy(buf,"IRET"); - return 1; - } - - return 0; -} - -/* TODO: What revision of the 8086 did ENTER and LEAVE first appear? */ -int Sfx86OpcodeExec_enterleave(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0xC8 && ctx->__private->level >= SX86_CPULEVEL_8086) { // ENTER - sx86_uword Size; - sx86_uword FrameTemp; - sx86_ubyte NestingLevel; - int i; - - Size = softx86_fetch_exec_byte(ctx); - Size |= softx86_fetch_exec_byte(ctx)<<8; - NestingLevel = softx86_fetch_exec_byte(ctx) & 31; - - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_BP].w.lo); - FrameTemp = ctx->state->general_reg[SX86_REG_SP].w.lo; - - if (NestingLevel > 0) { - for (i=1;i < NestingLevel;i++) { - ctx->state->general_reg[SX86_REG_BP].w.lo -= 2; - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_BP].w.lo); - } - - softx86_stack_pushw(ctx,FrameTemp); - } - - ctx->state->general_reg[SX86_REG_BP].w.lo = FrameTemp; - softx86_set_stack_ptr(ctx,ctx->state->segment_reg[SX86_SREG_SS].val,ctx->state->general_reg[SX86_REG_BP].w.lo - Size); - - return 1; - } - if (opcode == 0xC9 && ctx->__private->level >= SX86_CPULEVEL_8086) { // LEAVE - softx86_set_stack_ptr(ctx,ctx->state->segment_reg[SX86_SREG_SS].val,ctx->state->general_reg[SX86_REG_BP].w.lo); - ctx->state->general_reg[SX86_REG_BP].w.lo = softx86_stack_popw(ctx); - - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_enterleave(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xC8 && ctx->__private->level >= SX86_CPULEVEL_8086) { - sx86_uword popeye; - sx86_ubyte imm; - - popeye = softx86_fetch_dec_byte(ctx); - popeye |= softx86_fetch_dec_byte(ctx)<<8; - imm = softx86_fetch_dec_byte(ctx); - sprintf(buf,"ENTER 0x%04X,0x%02X",popeye,imm); - return 1; - } - if (opcode == 0xC9 && ctx->__private->level >= SX86_CPULEVEL_8086) { - strcpy(buf,"LEAVE"); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/procframe.h b/lib/3rdparty/softx86/softx86/procframe.h deleted file mode 100644 index f912254b3a7..00000000000 --- a/lib/3rdparty/softx86/softx86/procframe.h +++ /dev/null @@ -1,5 +0,0 @@ - -int Sfx86OpcodeExec_returns(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_returns(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_enterleave(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_enterleave(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/pushpop.c b/lib/3rdparty/softx86/softx86/pushpop.c deleted file mode 100644 index 8f1d12177ae..00000000000 --- a/lib/3rdparty/softx86/softx86/pushpop.c +++ /dev/null @@ -1,346 +0,0 @@ -/* - * pushpop.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for PUSH/POP/PUSHF/POPF/SAHF/LAHF instructions. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "pushpop.h" - -int Sfx86OpcodeExec_pop(sx86_ubyte opcode,softx86_ctx* ctx) -{ - sx86_uword val; - - if (opcode >= 0x58 && opcode <= 0x5F) { // POP [reg] - val = softx86_stack_popw(ctx); - ctx->state->general_reg[opcode-0x58].w.lo = val; - return 1; - } - - if (opcode == 0x1F) { // POP DS - val = softx86_stack_popw(ctx); - softx86_setsegval(ctx,SX86_SREG_DS,val); - return 1; - } - - if (opcode == 0x07) { // POP ES - val = softx86_stack_popw(ctx); - softx86_setsegval(ctx,SX86_SREG_ES,val); - return 1; - } - - if (opcode == 0x17) { // POP SS - val = softx86_stack_popw(ctx); - softx86_setsegval(ctx,SX86_SREG_SS,val); - return 1; - } - - if (opcode == 0x0F) { // POP CS (8086/8088 only) - if (ctx->__private->level <= SX86_CPULEVEL_80186) { - val = softx86_stack_popw(ctx); - softx86_setsegval(ctx,SX86_SREG_CS,val); - } - else { - Sfx86OpcodeTable* sop; - sx86_ubyte op2; - - /* leap into the second-level opcode table */ - sop = (Sfx86OpcodeTable*)ctx->__private->opcode_table_sub_0Fh; - op2 = softx86_fetch_exec_byte(ctx); - return sop->table[op2].exec(op2,ctx); - } - - return 1; - } - - if (opcode == 0x9D) { // POPF - ctx->state->reg_flags.w.lo = softx86_stack_popw(ctx); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_pop(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode >= 0x58 && opcode <= 0x5F) { // POP [reg] - sprintf(buf,"POP %s",sx86_regs16[opcode-0x58]); - return 1; - } - - if (opcode == 0x1F) { // POP DS - strcpy(buf,"POP DS"); - return 1; - } - - if (opcode == 0x07) { // POP ES - strcpy(buf,"POP ES"); - return 1; - } - - if (opcode == 0x17) { // POP SS - strcpy(buf,"POP SS"); - return 1; - } - - if (opcode == 0x0F) { // POP CS (8086/8088 only) - if (ctx->__private->level <= SX86_CPULEVEL_80186) { - strcpy(buf,"POP CS"); - return 1; - } - else { - Sfx86OpcodeTable* sop; - sx86_ubyte op2; - - /* leap into the second-level opcode table */ - sop = (Sfx86OpcodeTable*)ctx->__private->opcode_table_sub_0Fh; - op2 = softx86_fetch_dec_byte(ctx); - return sop->table[op2].dec(op2,ctx,buf); - } - } - - if (opcode == 0x9D) { // POPF - strcpy(buf,"POPF"); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_push(sx86_ubyte opcode,softx86_ctx* ctx) -{ - sx86_uword val; - - if (opcode >= 0x50 && opcode <= 0x57) { // PUSH [reg] - if (opcode == 0x54 && ctx->bugs->decrement_sp_before_store) // 0x54 = (E)SP - val = ctx->state->general_reg[opcode-0x50].w.lo - 2; - else - val = ctx->state->general_reg[opcode-0x50].w.lo; - - softx86_stack_pushw(ctx,val); - return 1; - } - - if (opcode == 0x1E) { // PUSH DS - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_DS].val); - return 1; - } - - if (opcode == 0x06) { // PUSH ES - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_ES].val); - return 1; - } - - if (opcode == 0x16) { // PUSH SS - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_SS].val); - return 1; - } - - if (opcode == 0x0E) { // PUSH CS - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - return 1; - } - - if (opcode == 0x9C) { // PUSHF - softx86_stack_pushw(ctx,ctx->state->reg_flags.w.lo); - return 1; - } - - if (opcode == 0x6A) // PUSH imm8 - { - sx86_ubyte b = softx86_fetch_exec_byte(ctx); - softx86_stack_pushw(ctx, (sx86_uword)b); - return 1; - } - - if (opcode == 0x68) // PUSH imm16 - { - sx86_uword w = softx86_fetch_exec_byte(ctx); - w |= softx86_fetch_exec_byte(ctx) << 8; - softx86_stack_pushw(ctx, w); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_push(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode >= 0x50 && opcode <= 0x57) { // PUSH [reg] - sprintf(buf,"PUSH %s",sx86_regs16[opcode-0x50]); - return 1; - } - - if (opcode == 0x1E) { // PUSH DS - strcpy(buf,"PUSH DS"); - return 1; - } - - if (opcode == 0x06) { // PUSH ES - strcpy(buf,"PUSH ES"); - return 1; - } - - if (opcode == 0x16) { // PUSH SS - strcpy(buf,"PUSH SS"); - return 1; - } - - if (opcode == 0x0E) { // PUSH CS - strcpy(buf,"PUSH CS"); - return 1; - } - - if (opcode == 0x9C) { // PUSHF - strcpy(buf,"PUSHF"); - return 1; - } - - if (opcode == 0x6A && ctx->__private->level >= SX86_CPULEVEL_80186) // PUSH imm8 - { - sx86_ubyte b = softx86_fetch_exec_byte(ctx); - sprintf(buf, "PUSH %02Xh", b); - return 1; - } - - if (opcode == 0x68 && ctx->__private->level >= SX86_CPULEVEL_80186) // PUSH imm16 - { - sx86_uword w = softx86_fetch_exec_byte(ctx); - w |= softx86_fetch_exec_byte(ctx) << 8; - sprintf(buf, "PUSH %04Xh", w); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_ahf(sx86_ubyte opcode,softx86_ctx* ctx) -{ - if (opcode == 0x9E) { // SAHF - ctx->state->reg_flags.b.lo &= ~0xD5; - ctx->state->reg_flags.b.lo |= (ctx->state->general_reg[SX86_REG_AX].b.hi&0xD5); - return 1; - } - - if (opcode == 0x9F) { // LAHF - ctx->state->general_reg[SX86_REG_AX].b.hi = ctx->state->reg_flags.b.lo; - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_ahf(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0x9E) { // SAHF - strcpy(buf,"SAHF"); - return 1; - } - - if (opcode == 0x9F) { // LAHF - strcpy(buf,"LAHF"); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_pusha(sx86_ubyte opcode,softx86_ctx* ctx) -{ -/* TODO: When did PUSHA/POPA really appear in the x86 instruction set? - Does this originate as far back as the original 8086? - Documentation seems to be scarce about this... */ - if (opcode == 0x60 && ctx->__private->level >= SX86_CPULEVEL_80186) { // PUSHA/PUSHAD - sx86_uword temp_sp; - - temp_sp = ctx->state->general_reg[SX86_REG_SP].w.lo; - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo); - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_CX].w.lo); - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_DX].w.lo); - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_BX].w.lo); - -/* emulate bug in PUSHA that exist in CPUs prior to 286 */ - if (ctx->bugs->decrement_sp_before_store) - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_SP].w.lo); - else - softx86_stack_pushw(ctx,temp_sp); - - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_BP].w.lo); - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_SI].w.lo); - softx86_stack_pushw(ctx,ctx->state->general_reg[SX86_REG_DI].w.lo); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_pusha(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ -/* TODO: When did PUSHA/POPA really appear in the x86 instruction set? - Does this originate as far back as the original 8086? - Documentation seems to be scarce about this... */ - if (opcode == 0x60 && ctx->__private->level >= SX86_CPULEVEL_80186) { // PUSHA/PUSHAD - strcpy(buf,"PUSHA"); - return 1; - } - - return 0; -} - -int Sfx86OpcodeExec_popa(sx86_ubyte opcode,softx86_ctx* ctx) -{ -/* TODO: When did PUSHA/POPA really appear in the x86 instruction set? - Does this originate as far back as the original 8086? - Documentation seems to be scarce about this... */ - if (opcode == 0x61 && ctx->__private->level >= SX86_CPULEVEL_80186) { // POPA/POPAD - ctx->state->general_reg[SX86_REG_DI].w.lo = softx86_stack_popw(ctx); - ctx->state->general_reg[SX86_REG_SI].w.lo = softx86_stack_popw(ctx); - ctx->state->general_reg[SX86_REG_BP].w.lo = softx86_stack_popw(ctx); -/* TODO: all versions prior to the 286 had bugs storing SP... - does that also mean they were stupid enough to - restore it? anybody know? */ - softx86_stack_popw(ctx); - ctx->state->general_reg[SX86_REG_BX].w.lo = softx86_stack_popw(ctx); - ctx->state->general_reg[SX86_REG_DX].w.lo = softx86_stack_popw(ctx); - ctx->state->general_reg[SX86_REG_CX].w.lo = softx86_stack_popw(ctx); - ctx->state->general_reg[SX86_REG_AX].w.lo = softx86_stack_popw(ctx); - return 1; - } - - return 0; -} - -int Sfx86OpcodeDec_popa(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ -/* TODO: When did PUSHA/POPA really appear in the x86 instruction set? - Does this originate as far back as the original 8086? - Documentation seems to be scarce about this... */ - if (opcode == 0x61 && ctx->__private->level >= SX86_CPULEVEL_80186) { // POPA/POPAD - strcpy(buf,"POPA"); - return 1; - } - - return 0; -} - diff --git a/lib/3rdparty/softx86/softx86/pushpop.h b/lib/3rdparty/softx86/softx86/pushpop.h deleted file mode 100644 index 529fcea4dd2..00000000000 --- a/lib/3rdparty/softx86/softx86/pushpop.h +++ /dev/null @@ -1,11 +0,0 @@ - -int Sfx86OpcodeExec_push(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_push(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_pop(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_pop(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_ahf(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_ahf(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_pusha(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_pusha(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); -int Sfx86OpcodeExec_popa(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_popa(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/resource.h b/lib/3rdparty/softx86/softx86/resource.h deleted file mode 100644 index 6d37cb5345e..00000000000 --- a/lib/3rdparty/softx86/softx86/resource.h +++ /dev/null @@ -1,15 +0,0 @@ -//{{NO_DEPENDENCIES}} -// Microsoft Developer Studio generated include file. -// Used by softx86_dll.rc -// - -// Next default values for new objects -// -#ifdef APSTUDIO_INVOKED -#ifndef APSTUDIO_READONLY_SYMBOLS -#define _APS_NEXT_RESOURCE_VALUE 101 -#define _APS_NEXT_COMMAND_VALUE 40001 -#define _APS_NEXT_CONTROL_VALUE 1000 -#define _APS_NEXT_SYMED_VALUE 101 -#endif -#endif diff --git a/lib/3rdparty/softx86/softx86/shovel.c b/lib/3rdparty/softx86/softx86/shovel.c deleted file mode 100644 index 938ae894084..00000000000 --- a/lib/3rdparty/softx86/softx86/shovel.c +++ /dev/null @@ -1,335 +0,0 @@ -/* - * shovel.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Decompiler and executioneer for MOVS, LODS, CMPS, SCAS, and STOS. - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include "optable.h" -#include "shovel.h" - -/* references to add.c */ -sx86_ubyte op_sub8(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val); -sx86_uword op_sub16(softx86_ctx* ctx,sx86_uword src,sx86_uword val); - -int Sfx86OpcodeExec_shovel(sx86_ubyte opcode,softx86_ctx* ctx) -{ - int sz,ecx_terminal,zflag_terminal; - int inc_esi,inc_edi,sto_edi,get_edi,df; - sx86_udword si,di,addr; - sx86_ubyte tmp8; - sx86_uword tmp16; - sx86_ubyte tmp8dst; - sx86_uword tmp16dst; - sx86_uword seg; - - if ((opcode&0xFE) == 0xA4) { // MOVS - if (opcode&1) sz = 2; - else sz = 1; - inc_esi = 1; - inc_edi = 1; - sto_edi = 1; - get_edi = 0; - } - else if ((opcode&0xFE) == 0xA6) { // CMPS - if (opcode&1) sz = 2; - else sz = 1; - inc_esi = 1; - inc_edi = 1; - sto_edi = 0; - get_edi = 1; /* CMPS compares ds:si and es:di */ - } - else if ((opcode&0xFE) == 0xAA) { // STOS - if (opcode&1) sz = 2; - else sz = 1; - inc_esi = 0; - inc_edi = 1; - sto_edi = 1; - get_edi = 0; - } - else if ((opcode&0xFE) == 0xAC) { // LODS - if (opcode&1) sz = 2; - else sz = 1; - inc_esi = 1; - inc_edi = 0; - sto_edi = 0; - get_edi = 0; - } - else if ((opcode&0xFE) == 0xAE) { // SCAS - if (opcode&1) sz = 2; - else sz = 1; - inc_esi = 0; - inc_edi = 1; - sto_edi = 0; - get_edi = 1; - } - else { - return 0; - } - -/* TODO: If 32-bit address override get full 32 bits */ - si = (sx86_udword)ctx->state->general_reg[SX86_REG_SI].w.lo; - di = (sx86_udword)ctx->state->general_reg[SX86_REG_DI].w.lo; - -/* [E]CX == 0 is a terminal condition if REP was encountered */ -/* the ZF flag can also be a terminal condition, depending on the opcode */ - if (ctx->state->rep_flag > 0) { - /* TODO: If 32-bit override present, use ECX not CX */ - ecx_terminal = (ctx->state->general_reg[SX86_REG_CX].w.lo == 0); - -/* some instructions don't take the ZF flag into account */ - if ((opcode&0xFE) == 0xA4) /* MOVS */ - zflag_terminal = 0; - else if ((opcode&0xFE) == 0xAA) /* STOS */ - zflag_terminal = 0; - else if ((opcode&0xFE) == 0xAC) /* LODS */ - zflag_terminal = 0; - else - zflag_terminal = 0; - } - else { - ecx_terminal = 0; - zflag_terminal = 0; - } - -/* are we in a REP loop terminal condition? */ - if (ecx_terminal) return 1; - if (zflag_terminal) return 1; - -/* get direction flag */ - df = (ctx->state->reg_flags.val & SX86_CPUFLAG_DIRECTIONREV); - -/* fetch from src */ - if (inc_esi) { - if (ctx->state->is_segment_override) - seg = ctx->state->segment_override; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - - addr = sx86_far_to_linear(ctx,seg,si); - if (sz == 2) { - tmp16=0; - softx86_fetch(ctx,NULL,addr,&tmp16,2); - SWAP_WORD_FROM_LE(tmp16); - if (df) si -= 2; - else si += 2; - } - else if (sz == 1) { - tmp8=0; - softx86_fetch(ctx,NULL,addr,&tmp8,1); - if (df) si--; - else si++; - } - } - -/* MOVS? */ - if ((opcode&0xFE) == 0xA4) { - tmp16dst = tmp16; - tmp8dst = tmp8; - } -/* LODSB? */ - else if (opcode == 0xAC) { - ctx->state->general_reg[SX86_REG_AX].b.lo = tmp8; - } -/* LODSW? */ - else if (opcode == 0xAD) { -/* TODO: 32-bit data override means LODSD not LODSW */ - ctx->state->general_reg[SX86_REG_AX].w.lo = tmp16; - } -/* STOSB? */ - else if (opcode == 0xAA) { - tmp8dst = ctx->state->general_reg[SX86_REG_AX].b.lo; - } -/* STOSW? */ - else if (opcode == 0xAB) { -/* TODO: 32-bit data override means LODSD not LODSW */ - tmp16dst = ctx->state->general_reg[SX86_REG_AX].w.lo; - } - -/* place in dst */ - if (inc_edi) { - if (ctx->state->is_segment_override) - seg = ctx->state->segment_override; - else - seg = ctx->state->segment_reg[SX86_SREG_ES].val; - - addr = sx86_far_to_linear(ctx,seg,di); - if (get_edi) { - if (sz == 2) { - tmp16dst=0; - softx86_fetch(ctx,NULL,addr,&tmp16dst,2); - SWAP_WORD_FROM_LE(tmp16dst); - } - else if (sz == 1) { - tmp8dst=0; - softx86_fetch(ctx,NULL,addr,&tmp8dst,1); - } - } - else if (sto_edi) { - if (sz == 2) { - SWAP_WORD_TO_LE(tmp16dst); - softx86_write(ctx,NULL,addr,&tmp16dst,2); - } - else if (sz == 1) { - softx86_write(ctx,NULL,addr,&tmp8dst,1); - } - } - - if (df) { - if (sz == 2) - di -= 2; - else if (sz == 1) - di--; - } - else { - if (sz == 2) - di += 2; - else if (sz == 1) - di++; - } - } - -/* CMPSB? */ - if (opcode == 0xA6) { - /* functions like this: */ - /* tmp8 = ds:si */ - /* tmp8dst = es:di */ - /* cmp tmp8,tmp8dst */ - op_sub8(ctx,tmp8,tmp8dst); - -/* update terminal condition now that ZF changed */ - if (ctx->state->rep_flag == 1) - zflag_terminal = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - else if (ctx->state->rep_flag == 2) - zflag_terminal = !(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - } -/* CMPSW? */ - else if (opcode == 0xA7) { - /* functions like this: */ - /* tmp16 = ds:si */ - /* tmp16dst = es:di */ - /* cmp tmp16,tmp16dst */ - op_sub16(ctx,tmp16,tmp16dst); - -/* update terminal condition now that ZF changed */ - if (ctx->state->rep_flag == 1) - zflag_terminal = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - else if (ctx->state->rep_flag == 2) - zflag_terminal = !(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - } -/* SCASB? */ - else if (opcode == 0xAE) { - /* functions like this: */ - /* tmp8 = AL */ - /* tmp8dst = es:di */ - /* cmp tmp8,tmp8dst */ - op_sub8(ctx,ctx->state->general_reg[SX86_REG_AX].b.lo,tmp8dst); - -/* update terminal condition now that ZF changed */ - if (ctx->state->rep_flag == 1) - zflag_terminal = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - else if (ctx->state->rep_flag == 2) - zflag_terminal = !(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - } -/* SCASW? */ - else if (opcode == 0xAF) { - /* functions like this: */ - /* tmp16 = AL */ - /* tmp16dst = es:di */ - /* cmp tmp16,tmp16dst */ - op_sub16(ctx,ctx->state->general_reg[SX86_REG_AX].w.lo,tmp16dst); - -/* update terminal condition now that ZF changed */ - if (ctx->state->rep_flag == 1) - zflag_terminal = (ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - else if (ctx->state->rep_flag == 2) - zflag_terminal = !(ctx->state->reg_flags.val & SX86_CPUFLAG_ZERO); - } - -/* TODO: If 32-bit address override store full 32 bits */ - ctx->state->general_reg[SX86_REG_SI].w.lo = (sx86_uword)si; - ctx->state->general_reg[SX86_REG_DI].w.lo = (sx86_uword)di; - -/* TODO: If 32-bit data override decrement full 32 bits */ - if (ctx->state->rep_flag > 0) - ctx->state->general_reg[SX86_REG_CX].w.lo--; /* decrement [E]CX */ - -/* keep the REP loop going */ - if (ctx->state->rep_flag > 0) { -/* why execute this instruction again when we KNOW that [E]CX == 0? */ - /* TODO: If 32-bit override present, use ECX not CX */ - ecx_terminal = (ctx->state->general_reg[SX86_REG_CX].w.lo == 0); - - if (ecx_terminal) return 1; - else if (zflag_terminal) return 1; - else return 3; - } - - return 1; -} - -int Sfx86OpcodeDec_shovel(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]) -{ - if (opcode == 0xA4) { // MOVSB - strcpy(buf,"MOVSB "); - return 1; - } - if (opcode == 0xA5) { // MOVSW - strcpy(buf,"MOVSW "); - return 1; - } - if (opcode == 0xA6) { // CMPSB - strcpy(buf,"CMPSB "); - return 1; - } - if (opcode == 0xA7) { // CMPSW - strcpy(buf,"CMPSW "); - return 1; - } - if (opcode == 0xAA) { // STOSB - strcpy(buf,"STOSB "); - return 1; - } - if (opcode == 0xAB) { // STOSW - strcpy(buf,"STOSW "); - return 1; - } - if (opcode == 0xAC) { // LODSB - strcpy(buf,"LODSB "); - return 1; - } - if (opcode == 0xAD) { // LODSW - strcpy(buf,"LODSW "); - return 1; - } - if (opcode == 0xAE) { // SCASB - strcpy(buf,"SCASB "); - return 1; - } - if (opcode == 0xAF) { // SCASW - strcpy(buf,"SCASW "); - return 1; - } - - return 0; -} diff --git a/lib/3rdparty/softx86/softx86/shovel.h b/lib/3rdparty/softx86/softx86/shovel.h deleted file mode 100644 index cd71750f78d..00000000000 --- a/lib/3rdparty/softx86/softx86/shovel.h +++ /dev/null @@ -1,3 +0,0 @@ - -int Sfx86OpcodeExec_shovel(sx86_ubyte opcode,softx86_ctx* ctx); -int Sfx86OpcodeDec_shovel(sx86_ubyte opcode,softx86_ctx* ctx,char buf[128]); diff --git a/lib/3rdparty/softx86/softx86/softx86.c b/lib/3rdparty/softx86/softx86/softx86.c deleted file mode 100644 index da6150189f8..00000000000 --- a/lib/3rdparty/softx86/softx86/softx86.c +++ /dev/null @@ -1,2993 +0,0 @@ -/* - * softx86.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Softx86 library API. - * - * Initialization, de-initialization, register modification, and default - * routines for callbacks (in case they weren't set by the host app). - * - * Internal to this library, there are also functions to take care of - * fetching the current opcode (as referred to by CS:IP), fetching - * the current opcode for the decompiler (as referred to by a separate - * pair CS:IP), and pushing/popping data to/from the stack (SS:SP). - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include -#include "optable.h" - -/* softx86_setsegment(context,segid,val) - Sets a segment register and all hidden register information */ -int softx86_setsegval(softx86_ctx* ctx,int sreg_id,sx86_udword x) -{ - if (sreg_id > 7 || sreg_id < 0) return 0; - -/* TODO: In 286/386 protected mode fetch limit from GDT/LDT */ - ctx->state->segment_reg[sreg_id].val = x; - ctx->state->segment_reg[sreg_id].cached_linear = SEGMENT_TO_LINEAR(x); - ctx->state->segment_reg[sreg_id].cached_limit = 0xFFFF; - - return 1; /* success */ -} - -/* softx86_reset(context) - Resets a CPU - - return value: - 0 = failed - 1 = success */ -int softx86_reset(softx86_ctx* ctx) -{ - if (!ctx) return 0; - - if (ctx->__private->level >= SX86_CPULEVEL_80286) - ctx->__private->addr_mask = 0xFFFFFF; /* 80286 24-bit addressing */ - else - ctx->__private->addr_mask = 0xFFFFF; /* 8086/8088/80186 20-bit addressing */ - - ctx->state->general_reg[SX86_REG_AX].val = 0; - ctx->state->general_reg[SX86_REG_BX].val = 0; - ctx->state->general_reg[SX86_REG_CX].val = 0; - ctx->state->general_reg[SX86_REG_DX].val = 0; - ctx->state->general_reg[SX86_REG_SI].val = 0; - ctx->state->general_reg[SX86_REG_DI].val = 0; - ctx->state->general_reg[SX86_REG_SP].val = 0; - ctx->state->general_reg[SX86_REG_BP].val = 0; - ctx->state->reg_flags.val = SX86_CPUFLAG_RESERVED_01; - softx86_setsegval(ctx,SX86_SREG_DS,0xF000); - softx86_setsegval(ctx,SX86_SREG_ES,0xF000); - softx86_setsegval(ctx,SX86_SREG_SS,0xF000); - - ctx->__private->ptr_regs_8reg[0] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_AX].b.lo); // AL - ctx->__private->ptr_regs_8reg[1] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_CX].b.lo); // CL - ctx->__private->ptr_regs_8reg[2] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_DX].b.lo); // DL - ctx->__private->ptr_regs_8reg[3] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_BX].b.lo); // BL - ctx->__private->ptr_regs_8reg[4] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_AX].b.hi); // AH - ctx->__private->ptr_regs_8reg[5] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_CX].b.hi); // CH - ctx->__private->ptr_regs_8reg[6] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_DX].b.hi); // DH - ctx->__private->ptr_regs_8reg[7] = (sx86_ubyte*)(&ctx->state->general_reg[SX86_REG_BX].b.hi); // BH - -/* initial CPU instruction pointer in BIOS area on older machines: 0xF000:0xFFF0 (as far as I know) */ - softx86_setsegval(ctx,SX86_SREG_CS,0xF000); - ctx->state->reg_ip = 0xFFF0; - ctx->state->int_hw_flag = 0; - ctx->state->int_nmi = 0; - -/* switch on/off bugs */ - ctx->bugs->preemptible_after_prefix = (ctx->__private->level <= SX86_CPULEVEL_8086)?1:0; - ctx->bugs->decrement_sp_before_store = (ctx->__private->level <= SX86_CPULEVEL_80186)?1:0; - ctx->bugs->mask_5bit_shiftcount = (ctx->__private->level >= SX86_CPULEVEL_80286)?1:0; - -/* CPU mode flags */ - ctx->state->reg_cr0 = 0; - -/* opcode table */ - ctx->__private->opcode_table = (void*)(&optab8086); - ctx->__private->opcode_table_sub_0Fh = (void*)(&optab8086_0Fh); - -/* we were just reset */ - ctx->callbacks->on_reset(ctx); - - return 1; /* success */ -} - -int softx86_getversion(int *major,int *minor,int *subminor) -{ - if (!minor || !major || !subminor) return 0; - - *major = SOFTX86_VERSION_HI; - *minor = SOFTX86_VERSION_LO; - *subminor = SOFTX86_VERSION_SUBLO; - return 1; -} - -/* softx86_init(context) - Initialize a CPU context structure. - - return value: - 0 = failed - 1 = success - 2 = beta development advisory (CPU level emulation not quite stable) */ -int softx86_init(softx86_ctx* ctx,int level) -{ - int ret; - - ret=1; - if (!ctx) return 0; - if (level > SX86_CPULEVEL_80286) return 0; /* we currently support up to the 80286 */ - if (level < 0) return 0; /* apparently the host wants an 80(-1)86? :) */ - if (level > SX86_CPULEVEL_8086) ret=2; /* 80186 or higher emulation is not stable yet */ - -/* set up pointers */ - ctx->__private = (softx86_internal*)malloc(sizeof(softx86_internal)); - ctx->bugs = (softx86_bugs*)malloc(sizeof(softx86_bugs)); - ctx->callbacks = (softx86_callbacks*)malloc(sizeof(softx86_callbacks)); - ctx->state = (softx86_cpustate*)malloc(sizeof(softx86_cpustate)); - if ((!ctx->__private) || (!ctx->bugs) || (!ctx->callbacks) || (!ctx->state)) { - softx86_free(ctx); - return 0; - } - -/* store settings */ - ctx->__private->level = level; - -/* store version in the structure */ - ctx->version_hi = SOFTX86_VERSION_HI; - ctx->version_lo = SOFTX86_VERSION_LO; - ctx->version_sublo = SOFTX86_VERSION_SUBLO; - -/* default callbacks */ - ctx->callbacks->on_read_io = softx86_step_def_on_read_io; - ctx->callbacks->on_read_memory = softx86_step_def_on_read_memory; - ctx->callbacks->on_write_io = softx86_step_def_on_write_io; - ctx->callbacks->on_write_memory = softx86_step_def_on_write_memory; - ctx->callbacks->on_hw_int = softx86_step_def_on_hw_int; - ctx->callbacks->on_hw_int_ack = softx86_step_def_on_hw_int_ack; - ctx->callbacks->on_sw_int = softx86_step_def_on_sw_int; - ctx->callbacks->on_idle_cycle = softx86_step_def_on_idle_cycle; - ctx->callbacks->on_nmi_int = softx86_step_def_on_nmi_int; - ctx->callbacks->on_nmi_int_ack = softx86_step_def_on_nmi_int_ack; - ctx->callbacks->on_fpu_opcode_dec = softx86_step_def_on_fpu_opcode_dec; - ctx->callbacks->on_fpu_opcode_exec = softx86_step_def_on_fpu_opcode_exec; - ctx->callbacks->on_reset = softx86_step_def_on_reset; - -/* default pointers */ - ctx->ref_softx87_ctx = NULL; - -/* now reset */ - if (!softx86_reset(ctx)) return 0; - - return ret; /* success */ -} - -/* softx86_free(context) - Free a CPU context structure */ -int softx86_free(softx86_ctx* ctx) -{ - if (!ctx) return 0; - if (ctx->__private) free(ctx->__private); - if (ctx->bugs) free(ctx->bugs); - if (ctx->callbacks) free(ctx->callbacks); - if (ctx->state) free(ctx->state); - ctx->__private = NULL; - ctx->bugs = NULL; - ctx->callbacks = NULL; - ctx->state = NULL; - return 1; /* success */ -} - -/* fetch byte at executioneer CS:IP, increment pointer */ -sx86_ubyte softx86_fetch_exec_byte(softx86_ctx* ctx) -{ - sx86_ubyte opcode; - - if (!ctx) return 0; - - softx86_fetch(ctx,NULL,ctx->state->segment_reg[SX86_SREG_CS].cached_linear+ctx->state->reg_ip,&opcode,1); - ctx->state->reg_ip++; -/* TODO: If IP passes 0xFFFF generate an exception */ - - return opcode; -} - -/* fetch byte at decompiler CS:IP, increment pointer */ -sx86_ubyte softx86_fetch_dec_byte(softx86_ctx* ctx) -{ - sx86_ubyte opcode; - - if (!ctx) return 0; - - softx86_fetch(ctx,NULL,SEGMENT_TO_LINEAR(ctx->state->reg_cs_decompiler)+(ctx->state->reg_ip_decompiler),&opcode,1); - ctx->state->reg_ip_decompiler++; - return opcode; -} - -/* retrieve a word value from the stack pointer SS:SP */ -sx86_uword softx86_stack_popw(softx86_ctx* ctx) -{ - sx86_uword data; - - if (!ctx) return 0; - -/* TODO: If SP == 0xFFFF generate an exception */ - softx86_fetch(ctx,NULL,ctx->state->segment_reg[SX86_SREG_SS].cached_linear+ctx->state->general_reg[SX86_REG_SP].w.lo,&data,2); - SWAP_WORD_FROM_LE(data); - ctx->state->general_reg[SX86_REG_SP].w.lo += 2; -/* TODO: If SP passes 0xFFFF generate an exception */ - - return data; -} - -/* discard n bytes from stack pointer SS:SP */ -void softx86_stack_discard_n(softx86_ctx* ctx,int bytez) -{ - if (!ctx) return; - - ctx->state->general_reg[SX86_REG_SP].w.lo += bytez; -/* TODO: If SP passes 0xFFFF generate an exception */ -} - -/* adds n bytes to stack pointer SS:SP */ -void softx86_stack_add_n(softx86_ctx* ctx,int bytez) -{ - if (!ctx) return; - - ctx->state->general_reg[SX86_REG_SP].w.lo -= bytez; -/* TODO: If SP passes 0xFFFF generate an exception */ -} - -/* store a word value to the stack pointer SS:SP */ -void softx86_stack_pushw(softx86_ctx* ctx,sx86_uword data) -{ - SWAP_WORD_TO_LE(data); -/* TODO: If SP == 0x0001 generate an exception */ - ctx->state->general_reg[SX86_REG_SP].w.lo -= 2; - softx86_write(ctx,NULL,ctx->state->segment_reg[SX86_SREG_SS].cached_linear+ctx->state->general_reg[SX86_REG_SP].w.lo,&data,2); -} - -/* set stack pointer SS:SP */ -int softx86_set_stack_ptr(softx86_ctx* ctx,sx86_udword ss,sx86_udword sp) -{ - if (!ctx) return 0; - -/* TODO: Check SS:SP for validity */ - ctx->state->general_reg[SX86_REG_SP].w.lo = sp; - softx86_setsegval(ctx,SX86_SREG_SS,ss); - - return 1; -} - -/* set executioneer CS:IP */ -int softx86_set_instruction_ptr(softx86_ctx* ctx,sx86_udword cs,sx86_udword ip) -{ - if (!ctx) return 0; - -/* TODO: Check CS:IP for validity */ - ctx->state->reg_ip = ip; - softx86_setsegval(ctx,SX86_SREG_CS,cs); - - return 1; -} - -/* set executioneer IP (not CS). used for emulating near jumps. */ -int softx86_set_near_instruction_ptr(softx86_ctx* ctx,sx86_udword ip) -{ - if (!ctx) return 0; - -/* TODO: Check IP for validity */ - ctx->state->reg_ip = ip; - - return 1; -} - -/* set decompiler CS:IP */ -int softx86_set_instruction_dec_ptr(softx86_ctx* ctx,sx86_udword cs,sx86_udword ip) -{ - if (!ctx) return 0; - -/* TODO: Check CS:IP for validity */ - ctx->state->reg_ip_decompiler = ip; - ctx->state->reg_cs_decompiler = cs; - - return 1; -} - -/* create a stack frame for simple near procedural calls and set the instruction pointer (if ip != NULL) */ -int softx86_make_simple_near_call(softx86_ctx* ctx,sx86_udword* ip) -{ - if (!ctx) return 0; - - softx86_stack_pushw(ctx,ctx->state->reg_ip); - if (ip != NULL) return softx86_set_near_instruction_ptr(ctx,*ip); - return 1; -} - -/* create a stack frame for simple far procedural calls and set the instruction pointer (if ip != NULL) */ -int softx86_make_simple_far_call(softx86_ctx* ctx,sx86_udword* cs,sx86_udword* ip) -{ - if (!ctx) return 0; - - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - softx86_stack_pushw(ctx,ctx->state->reg_ip); - if (cs != NULL && ip != NULL) return softx86_set_instruction_ptr(ctx,*cs,*ip); - return 1; -} - -/* create a stack frame for simple interrupt procedural calls and set the instruction pointer (if ip != NULL) */ -int softx86_make_simple_interrupt_call(softx86_ctx* ctx,sx86_udword* cs,sx86_udword* ip) -{ - if (!ctx) return 0; - - softx86_stack_pushw(ctx,ctx->state->reg_flags.w.lo); - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - softx86_stack_pushw(ctx,ctx->state->reg_ip); - if (cs != NULL && ip != NULL) return softx86_set_instruction_ptr(ctx,*cs,*ip); - return 1; -} - -/* retrieves an interrupt vector */ -int softx86_get_intvect(softx86_ctx* ctx,sx86_ubyte i,sx86_uword *seg,sx86_uword *ofs) -{ - sx86_uword _seg,_ofs; - sx86_udword o; - - if (!ctx) return 0; - -/* obtain the interrupt vector */ - o = (i<<2); - softx86_fetch(ctx,NULL,o,(void*)(&_ofs),2); - SWAP_WORD_FROM_LE(_ofs); - *ofs = _ofs; - - o += 2; - softx86_fetch(ctx,NULL,o,(void*)(&_seg),2); - SWAP_WORD_FROM_LE(_seg); - *seg = _seg; - - return 1; -} - -/* sets an interrupt vector */ -int softx86_set_intvect(softx86_ctx* ctx,sx86_ubyte i,sx86_uword seg,sx86_uword ofs) -{ - sx86_udword o; - - if (!ctx) return 0; - -/* obtain the interrupt vector */ - o = (i<<2); - SWAP_WORD_TO_LE(ofs); - softx86_write(ctx,NULL,o,(void*)(&ofs),2); - - o += 2; - SWAP_WORD_TO_LE(seg); - softx86_write(ctx,NULL,o,(void*)(&seg),2); - - return 1; -} - -/* create interrupt frame and manipulate registers */ -void softx86_go_int_frame(softx86_ctx* ctx,sx86_ubyte i) -{ - sx86_uword seg,ofs; - -/* get interrupt vector */ - if (!softx86_get_intvect(ctx,i,&seg,&ofs)) return; - -/* save old address */ - softx86_stack_pushw(ctx,ctx->state->reg_flags.val); - softx86_stack_pushw(ctx,ctx->state->segment_reg[SX86_SREG_CS].val); - softx86_stack_pushw(ctx,ctx->state->reg_ip); - -/* disable interrupts */ - ctx->state->reg_flags.val &= ~SX86_CPUFLAG_INTENABLE; - -/* go! */ - if (!softx86_set_instruction_ptr(ctx,seg,ofs)) return; -} - -/* enable/disable emulation of specific bugs. */ -int softx86_setbug(softx86_ctx* ctx,sx86_udword bug_id,sx86_ubyte on_off) -{ - if (bug_id == SX86_BUG_PREEMPTIBLE_AFTER_PREFIX) { - ctx->bugs->preemptible_after_prefix = on_off; - return 1; - } - else if (bug_id == SX86_BUG_SP_DECREMENT_BEFORE_STORE) { - ctx->bugs->decrement_sp_before_store = on_off; - } - - return 0; -} - -/* simulate external hardware interrupt from host app. */ -int softx86_ext_hw_signal(softx86_ctx* ctx,sx86_ubyte i) -{ - if (!ctx) return 0; - -/* make sure the poor CPU isn't getting deluged by interrupts. - as far as I know, every system using the x86 with an interrupt - system has some sort of moderator for the #int line. The x86 PC - platform for instance, has a "programmable interrupt controller" - that is responsible for handling 16 interrupt signals (IRQ 0 - thru 15) and presenting them one at a time to the CPU. */ - if (ctx->state->int_hw_flag) return 0; - - ctx->callbacks->on_hw_int(ctx,i); - ctx->state->int_hw_flag = 1; - ctx->state->int_hw = i; - - return 1; -} - -/* simulate external hardware NMI interrupt from host app. */ -int softx86_ext_hw_nmi_signal(softx86_ctx* ctx) -{ - if (!ctx) return 0; - -/* only one #NMI at a time! */ -/* TODO: Is the #NMI interrupt number fixed or variable? */ - if (ctx->state->int_nmi) return 0; - - ctx->state->int_nmi = 1; - ctx->callbacks->on_nmi_int(ctx); - - return 1; -} - -/* simulate internal software interrupt. */ -int softx86_int_sw_signal(softx86_ctx* ctx,sx86_ubyte i) -{ - if (!ctx) return 0; - - ctx->callbacks->on_sw_int(ctx,i); - softx86_go_int_frame(ctx,i); - - return 1; -} - -/* INTERNAL USE: used by this library to send acknowledgement back - to host application for the given interrupt signal. */ -int softx86_ext_hw_ack(softx86_ctx* ctx) -{ - if (!ctx) return 0; - if (!ctx->state->int_hw_flag) return 0; - - ctx->callbacks->on_hw_int_ack(ctx,ctx->state->int_hw); - ctx->state->int_hw_flag = 0; - ctx->state->int_hw = 0; - - return 1; -} - -/* INTERNAL USE: used by this library to send acknowledgement back - to host application for the given interrupt signal. */ -int softx86_ext_hw_nmi_ack(softx86_ctx* ctx) -{ - if (!ctx) return 0; - if (!ctx->state->int_nmi) return 0; - - ctx->callbacks->on_nmi_int_ack(ctx); - ctx->state->int_nmi = 0; - - return 1; -} - -/* softx86_step(context) - Executes ONE instruction at CS:IP - - return value: - 0 = failed - 1 = success */ -int softx86_step(softx86_ctx* ctx) -{ - Sfx86OpcodeTable* sop; - sx86_ubyte opcode; - int lp,x,restart,err,count; - int can_hwint; - - if (!ctx) return 0; - sop = (Sfx86OpcodeTable*)(ctx->__private->opcode_table); - if (!sop) return 0; - - ctx->state->is_segment_override = 0; - ctx->state->segment_override = 0; - ctx->state->rep_flag = 0; - ctx->state->reg_cs_exec_initial = ctx->state->segment_reg[SX86_SREG_CS].val; - ctx->state->reg_ip_exec_initial = ctx->state->reg_ip; - - lp = 1; - err = 0; - count = 16; - restart = 0; - can_hwint = 1; - while (lp && count-- > 0) { -/* if now is a good time to allow an interrupt and interrupts enabled, so be it */ - if (can_hwint || ctx->bugs->preemptible_after_prefix) { - if (ctx->state->int_nmi) { /* #NMI pin has priority */ - softx86_go_int_frame(ctx,2); - softx86_ext_hw_nmi_ack(ctx); - } - else if (ctx->state->reg_flags.val & SX86_CPUFLAG_INTENABLE) { - if (ctx->state->int_hw_flag) { - softx86_go_int_frame(ctx,ctx->state->int_hw); - softx86_ext_hw_ack(ctx); - } - } - - can_hwint=0; - } - -/* fetch opcode */ - opcode = softx86_fetch_exec_byte(ctx); -/* execute opcode */ - x = sop->table[opcode].exec(opcode,ctx); -/* what happened? */ - if (x == 0) { /* opcode not recognized? stop! */ - lp = 0; - restart = 1; - err = 1; - } - else if (x == 1) { /* opcode recognized? */ - lp = 0; - } - else if (x == 2) { /* opcode recognized but more parsing needed (i.e. instruction prefix)? */ - } - else if (x == 3) { /* opcode recognized, looping action in progress do not advance (i.e. REP MOVSB or HLT/WAIT)? */ - restart = 1; - lp = 0; - } - else { /* this indicates a bug in this library */ - lp = 0; - restart = 1; /* huh? */ - err = 1; - } - } - - if (count <= 0) { - err = 1; - restart = 1; - } - - if (restart) { - ctx->state->segment_reg[SX86_SREG_CS].val = ctx->state->reg_cs_exec_initial; - ctx->state->reg_ip = ctx->state->reg_ip_exec_initial; - } - - return !err; /* success */ -} - -/* softx86_decompile(context) - Decompiles ONE instruction at decoder CS:IP - - return value: - 0 = failed - 1 = success */ -int softx86_decompile(softx86_ctx* ctx,char asmbuf[256]) -{ - Sfx86OpcodeTable* sop; - sx86_ubyte opcode; - int lp,x,err,count,asmx; - char buf[256]; - - if (!ctx) return 0; - sop = (Sfx86OpcodeTable*)(ctx->__private->opcode_table); - if (!sop) return 0; - - lp = 1; - err = 0; - asmx = 0; - asmbuf[0] = 0; - count = 16; - while (lp && count-- > 0) { -/* fetch opcode */ - opcode = softx86_fetch_dec_byte(ctx); -/* execute opcode */ - x = sop->table[opcode].dec(opcode,ctx,buf); -/* what happened? */ - if (x == 0) { /* opcode not recognized? stop! */ - lp = 0; - err = 1; - } - else if (x == 1) { /* opcode recognized? */ - strcpy(asmbuf+asmx,buf); - lp = 0; - } - else if (x == 2) { /* opcode recognized but more parsing needed? */ - strcpy(asmbuf+asmx,buf); /* this is why asmbuf[] is 256 bytes :) */ - asmbuf += strlen(asmbuf+asmx); - } - else { /* this indicates a bug in this library */ - lp = 0; - err = 1; - } - } - - if (count <= 0) { - err = 1; - } - - return !err; /* success */ -} - -/* softx86_decompile_exec_cs_ip(context) - Point decompiler instructor ptr to where the executioneer CS:IP is */ -int softx86_decompile_exec_cs_ip(softx86_ctx* ctx) -{ - if (!ctx) return 0; - -/* set decompiler CS:IP to executioneer CS:IP */ - ctx->state->reg_cs_decompiler = ctx->state->segment_reg[SX86_SREG_CS].val; - ctx->state->reg_ip_decompiler = ctx->state->reg_ip; - - return 1; /* success */ -} - -/*-------------------------------------------------------------------------------- - default callbacks - --------------------------------------------------------------------------------*/ - -void softx86_step_def_on_read_memory(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - softx86_ctx *ctx = ((softx86_ctx*)_ctx); - if (!ctx || !buf || size < 1) return; - memset(buf,0xFF,size); -} - -void softx86_step_def_on_read_io(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - softx86_ctx *ctx = ((softx86_ctx*)_ctx); - if (!ctx || !buf || size < 1) return; - memset(buf,0xFF,size); -} - -void softx86_step_def_on_write_memory(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - softx86_ctx *ctx = ((softx86_ctx*)_ctx); - if (!ctx || !buf || size < 1) return; -} - -void softx86_step_def_on_write_io(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - softx86_ctx *ctx = ((softx86_ctx*)_ctx); - if (!ctx || !buf || size < 1) return; -} - -void softx86_step_def_on_hw_int(void* _ctx,sx86_ubyte i) -{ -} - -void softx86_step_def_on_sw_int(void* _ctx,sx86_ubyte i) -{ -} - -void softx86_step_def_on_hw_int_ack(void* _ctx,sx86_ubyte i) -{ -} - -void softx86_step_def_on_idle_cycle(void* _ctx) -{ -} - -void softx86_step_def_on_nmi_int(void* _ctx) -{ -} - -void softx86_step_def_on_nmi_int_ack(void* _ctx) -{ -} - -int softx86_step_def_on_fpu_opcode_exec(void* _ctx86,void* _ctx87,sx86_ubyte opcode) -{ - return 0; -} - -int softx86_step_def_on_fpu_opcode_dec(void* _ctx86,void* _ctx87,sx86_ubyte opcode,char buf[128]) -{ - return 0; -} - -void softx86_step_def_on_reset(/* softx86_ctx */ void* _ctx) -{ -} - -/*-------------------------------------------------------------------------------- - API for CPU itself to fetch data through a cache. - --------------------------------------------------------------------------------*/ -int softx86_fetch(softx86_ctx* ctx,void *reserved,sx86_udword addr,void *_buf,int sz) -{ - sx86_ubyte *buf = (sx86_ubyte*)(_buf); - int rsz; - sx86_udword raddr; - - if (!ctx || !buf || sz < 1) return 0; - - rsz = sz; - raddr = addr; - -/* TODO: fetching from cache can be implemented at this point, filling in by reassigning ratter, buf and rsz. */ - -/* save host application the aggrivation of dealing with 32-bit address wrap-arounds */ - if ((raddr+rsz) > 0 && (raddr+rsz) < rsz) { - ctx->callbacks->on_read_memory(ctx,raddr,buf,(sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF)); - raddr += (sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF); - rsz -= (sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF); - buf += (sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF); - ctx->callbacks->on_read_memory(ctx,raddr,buf,rsz); - return 1; - } - - ctx->callbacks->on_read_memory(ctx,raddr,buf,rsz); - - return 1; -} - -int softx86_write(softx86_ctx* ctx,void *reserved,sx86_udword addr,void *_buf,int sz) -{ - sx86_ubyte *buf = (sx86_ubyte*)(_buf); - int rsz; - sx86_udword raddr; - - if (!ctx || !buf || sz < 1) return 0; - - rsz = sz; - raddr = addr; - -/* TODO: writing to/through the cache can be implemented at this point, filling in by reassigning ratter, buf and rsz. */ - -/* save host application the aggrivation of dealing with 32-bit address wrap-arounds */ - if ((raddr+rsz) > 0 && (raddr+rsz) < rsz) { - ctx->callbacks->on_write_memory(ctx,raddr,buf,(sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF)); - raddr += (sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF); - rsz -= (sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF); - buf += (sx86_udword)((0x100000000L-raddr)&0xFFFFFFFF); - ctx->callbacks->on_write_memory(ctx,raddr,buf,rsz); - return 1; - } - - ctx->callbacks->on_write_memory(ctx,raddr,buf,rsz); - - return 1; -} - -void softx86_bswap2(sx86_ubyte *x) -{ - sx86_ubyte t; - - t=x[0]; x[0]=x[1]; x[1]=t; -} - -void softx86_bswap4(sx86_ubyte *x) -{ - sx86_ubyte t; - - t=x[0]; x[0]=x[3]; x[3]=t; - t=x[1]; x[1]=x[2]; x[2]=t; -} - -/* general purpose mod/reg/rm executioneer helper for LEA. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - d32 = 386+ 32-bit data size override - mod/reg/rm = mod/reg/rm unpacked byte - - Example of instructions that fit this format: - - LEA AX,[AX+2] (apparently a substitute for add ax,2?) - LEA BX,[SP] (seen sometimes as an alternative to mov bx,sp) - LEA EBX,[ESI+ECX] (surprisingly, often seen in Win32 code) -*/ -void sx86_exec_full_modregrm_lea(softx86_ctx* ctx,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm) -{ - if (mod == 3) { /* register <- register */ - /* TODO: Invalid opcode exception. */ - } - else { /* register <- memory */ - sx86_uword ofs; - -/* don't calculate segment value because LEA does not fetch memory, it only stores - the offset into the destination register */ - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - ctx->state->general_reg[reg].w.lo = ofs; - } -} - -/* general purpose mod/reg/rm executioneer helper for - instructions that modify the destination operand. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/reg/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operands "src" and "dst" - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - MOV AX,CX - MOV WORD PTR [3456h],DX - MOV SI,DI - MOV BX,WORD PTR [1246h] -*/ -void sx86_exec_full_modregrm_rw(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,sx86_ubyte opswap,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val)) -{ - if (mod == 3) { /* register <-> register */ - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword regv,rmv; - - regv = ctx->state->general_reg[reg].w.lo; - rmv = ctx->state->general_reg[rm].w.lo; - - if (opswap) - ctx->state->general_reg[reg].w.lo = - op16(ctx,regv,rmv); - else - ctx->state->general_reg[rm].w.lo = - op16(ctx,rmv,regv); - } - else { - sx86_ubyte regv,rmv; - - regv = *(ctx->__private->ptr_regs_8reg[reg]); - rmv = *(ctx->__private->ptr_regs_8reg[rm]); - - if (opswap) - *(ctx->__private->ptr_regs_8reg[reg]) = - op8(ctx,regv,rmv); - else - *(ctx->__private->ptr_regs_8reg[rm]) = - op8(ctx,rmv,regv); - } - } - else { /* register <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword regv,rmv; - - regv = ctx->state->general_reg[reg].w.lo; - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - if (opswap) { - ctx->state->general_reg[reg].w.lo = - op16(ctx,regv,rmv); - } - else { - rmv = op16(ctx,rmv,regv); - SWAP_WORD_TO_LE(rmv); - softx86_write(ctx,NULL,lo,&rmv,2); - } - } - else { - sx86_ubyte regv,rmv; - - regv = *(ctx->__private->ptr_regs_8reg[reg]); - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - - if (opswap) { - *(ctx->__private->ptr_regs_8reg[reg]) = - op8(ctx,regv,rmv); - } - else { - rmv = op8(ctx,rmv,regv); - softx86_write(ctx,NULL,lo,&rmv,1); - } - } - } -} - -/* general purpose mod/reg/rm executioneer helper for - instructions that do not modify the destination operand. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/reg/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operands "src" and "dst" - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - TEST AX,CX - TEST WORD PTR [3456h],DX - TEST SI,DI - TEST BX,WORD PTR [1246h] -*/ -void sx86_exec_full_modregrm_ro(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,sx86_ubyte opswap,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val)) -{ - if (mod == 3) { /* register <-> register */ - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword regv,rmv; - - regv = ctx->state->general_reg[reg].w.lo; - rmv = ctx->state->general_reg[rm].w.lo; - - if (opswap) - op16(ctx,regv,rmv); - else - op16(ctx,rmv,regv); - } - else { - sx86_ubyte regv,rmv; - - regv = *(ctx->__private->ptr_regs_8reg[reg]); - rmv = *(ctx->__private->ptr_regs_8reg[rm]); - - if (opswap) - op8(ctx,regv,rmv); - else - op8(ctx,rmv,regv); - } - } - else { /* register <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword regv,rmv; - - regv = ctx->state->general_reg[reg].w.lo; - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - if (opswap) { - op16(ctx,regv,rmv); - } - else { - op16(ctx,rmv,regv); - } - } - else { - sx86_ubyte regv,rmv; - - regv = *(ctx->__private->ptr_regs_8reg[reg]); - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - - if (opswap) { - op8(ctx,regv,rmv); - } - else { - op8(ctx,rmv,regv); - } - } - } -} - -/* general purpose mod/reg/rm executioneer helper for - instructions that do modify the destination operand - and need a FAR pointer - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/reg/rm = mod/reg/rm unpacked byte - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - LES BX,WORD PTR [5256h] -*/ -void sx86_exec_full_modregrm_far(softx86_ctx* ctx,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs)) -{ - if (mod == 3) { /* register <-> register */ - /* illegal */ - } - else { /* register <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - { - sx86_uword rmv,rmv2; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - lo += 2; - softx86_fetch(ctx,NULL,lo,&rmv2,2); - SWAP_WORD_FROM_LE(rmv); - SWAP_WORD_FROM_LE(rmv2); - ctx->state->general_reg[reg].w.lo = op16(ctx,rmv2,rmv); - } - } -} - -/* general purpose mod/reg/rm executioneer helper for - instructions that do not modify the destination operand - but need a FAR pointer and the register operand - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/reg/rm = mod/reg/rm unpacked byte - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - BOUND BX,WORD PTR [9874h] -*/ -void sx86_exec_full_modregrm_far_ro3(softx86_ctx* ctx,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,sx86_sword (*op16)(softx86_ctx* ctx,sx86_sword idx,sx86_sword upper,sx86_sword lower),sx86_sdword (*op32)(softx86_ctx* ctx,sx86_sdword idx,sx86_sdword upper,sx86_sdword lower)) -{ - if (mod == 3) { /* register <-> register */ - /* illegal */ - } - else { /* register <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - { - sx86_sword rmv,rmv2; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - lo += 2; - softx86_fetch(ctx,NULL,lo,&rmv2,2); - SWAP_WORD_FROM_LE(rmv); - SWAP_WORD_FROM_LE(rmv2); - op16(ctx,ctx->state->general_reg[reg].w.lo,rmv2,rmv); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that modify the destination operand - and have an immediate operand of specified size. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operands "src" and "dst" - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - MOV AH,2456h - MOV WORD PTR [1334h],2222h -*/ -void sx86_exec_full_modrmonly_rw_imm(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val),int sx) -{ - sx86_uword imm; - - if (mod == 3) { /* immediate <-> register */ - imm = softx86_fetch_exec_byte(ctx); - if (w16) - { - if (sx) imm |= (imm&0x80) ? 0xFF80 : 0; - else imm |= softx86_fetch_exec_byte(ctx)<<8; - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - rmv = ctx->state->general_reg[rm].w.lo; - - ctx->state->general_reg[rm].w.lo = - op16(ctx,rmv,(sx86_uword)imm); - } - else { - sx86_ubyte rmv; - - rmv = *(ctx->__private->ptr_regs_8reg[rm]); - - *(ctx->__private->ptr_regs_8reg[rm]) = - op8(ctx,rmv,(sx86_ubyte)imm); - } - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - imm = softx86_fetch_exec_byte(ctx); - if (w16) - { - if (sx) imm |= (imm&0x80) ? 0xFF80 : 0; - else imm |= softx86_fetch_exec_byte(ctx)<<8; - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - rmv = op16(ctx,rmv,(sx86_uword)imm); - SWAP_WORD_TO_LE(rmv); - softx86_write(ctx,NULL,lo,&rmv,2); - } - else { - sx86_ubyte rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - - rmv = op8(ctx,rmv,(sx86_ubyte)imm); - softx86_write(ctx,NULL,lo,&rmv,1); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that modify the destination operand - and have an immediate operand of specified size. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operands "src" and "dst" - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - MOV AH,2456h - MOV WORD PTR [1334h],2222h -*/ -void sx86_exec_full_modrmonly_rw_imm8(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val)) -{ - sx86_uword imm; - - if (mod == 3) { /* immediate <-> register */ - imm = softx86_fetch_exec_byte(ctx); - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - rmv = ctx->state->general_reg[rm].w.lo; - - ctx->state->general_reg[rm].w.lo = - op16(ctx,rmv,(sx86_uword)imm); - } - else { - sx86_ubyte rmv; - - rmv = *(ctx->__private->ptr_regs_8reg[rm]); - - *(ctx->__private->ptr_regs_8reg[rm]) = - op8(ctx,rmv,(sx86_ubyte)imm); - } - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - imm = softx86_fetch_exec_byte(ctx); - if (w16) imm |= softx86_fetch_exec_byte(ctx)<<8; - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - rmv = op16(ctx,rmv,(sx86_uword)imm); - SWAP_WORD_TO_LE(rmv); - softx86_write(ctx,NULL,lo,&rmv,2); - } - else { - sx86_ubyte rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - - rmv = op8(ctx,rmv,(sx86_ubyte)imm); - softx86_write(ctx,NULL,lo,&rmv,1); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that DO NOT modify the destination operand - and have an immediate operand of specified size. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operands "src" and "dst" - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - op32 = function to call for emulation of instruction, given 32-bit operands "src" and "dst" - - Example of instructions that fit this format: - - MOV AH,2456h - MOV WORD PTR [1334h],2222h -*/ -void sx86_exec_full_modrmonly_ro_imm(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src,sx86_ubyte val),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src,sx86_udword val),int sx) -{ - sx86_uword imm; - - if (mod == 3) { /* immediate <-> register */ - imm = softx86_fetch_exec_byte(ctx); - if (w16) - { - if (sx) imm |= (imm&0x80) ? 0xFF80 : 0; - else imm |= softx86_fetch_exec_byte(ctx)<<8; - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - rmv = ctx->state->general_reg[rm].w.lo; - op16(ctx,rmv,(sx86_uword)imm); - } - else { - sx86_ubyte rmv; - - rmv = *(ctx->__private->ptr_regs_8reg[rm]); - op8(ctx,rmv,(sx86_ubyte)imm); - } - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - imm = softx86_fetch_exec_byte(ctx); - if (w16) - { - if (sx) imm |= (imm&0x80) ? 0xFF80 : 0; - else imm |= softx86_fetch_exec_byte(ctx)<<8; - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - op16(ctx,rmv,(sx86_uword)imm); - } - else { - sx86_ubyte rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - - op8(ctx,rmv,(sx86_ubyte)imm); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that modify the destination operand - and do not have an immediate operand of specified size. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operand "src" - op16 = function to call for emulation of instruction, given 16-bit operand "src" - op32 = function to call for emulation of instruction, given 32-bit operand "src" - - INC BX - INC WORD PTR [2045h] -*/ -void sx86_exec_full_modrmonly_rw(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src)) -{ - if (mod == 3) { /* immediate <-> register */ - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - rmv = ctx->state->general_reg[rm].w.lo; - - ctx->state->general_reg[rm].w.lo = - op16(ctx,rmv); - } - else { - sx86_ubyte rmv; - - rmv = *(ctx->__private->ptr_regs_8reg[rm]); - - *(ctx->__private->ptr_regs_8reg[rm]) = - op8(ctx,rmv); - } - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - rmv = op16(ctx,rmv); - SWAP_WORD_TO_LE(rmv); - softx86_write(ctx,NULL,lo,&rmv,2); - } - else { - sx86_ubyte rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - - rmv = op8(ctx,rmv); - softx86_write(ctx,NULL,lo,&rmv,1); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that do not modify the destination operand - and do not have an immediate operand of specified size. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operand "src" - op16 = function to call for emulation of instruction, given 16-bit operand "src" - op32 = function to call for emulation of instruction, given 32-bit operand "src" - - CALL WORD PTR [2045h] -*/ -void sx86_exec_full_modrmonly_ro(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,sx86_ubyte (*op8)(softx86_ctx* ctx,sx86_ubyte src),sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src),sx86_udword (*op32)(softx86_ctx* ctx,sx86_udword src)) -{ - if (mod == 3) { /* immediate <-> register */ - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - op16(ctx,ctx->state->general_reg[rm].w.lo); - } - else { - op8(ctx,*(ctx->__private->ptr_regs_8reg[rm])); - } - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - op16(ctx,rmv); - } - else { - sx86_ubyte rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,1); - op8(ctx,rmv); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that modify the destination operand - and do not have an immediate operand of specified size. - these functions do not consider the previous value. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operand "src" - op16 = function to call for emulation of instruction, given 16-bit operand "src" - op32 = function to call for emulation of instruction, given 32-bit operand "src" - - POP WORD PTR [2045h] -*/ -void sx86_exec_full_modrmonly_wo(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,sx86_ubyte (*op8)(softx86_ctx* ctx),sx86_uword (*op16)(softx86_ctx* ctx),sx86_udword (*op32)(softx86_ctx* ctx)) -{ - if (mod == 3) { /* immediate <-> register */ - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - ctx->state->general_reg[rm].w.lo = op16(ctx); - } - else { - *(ctx->__private->ptr_regs_8reg[rm]) = op8(ctx); - } - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - rmv = op16(ctx); - SWAP_WORD_TO_LE(rmv); - softx86_write(ctx,NULL,lo,&rmv,2); - } - else { - sx86_ubyte rmv; - - lo = sx86_far_to_linear(ctx,seg,ofs); - rmv = op8(ctx); - softx86_write(ctx,NULL,lo,&rmv,1); - } - } -} - -/* general purpose mod/rm executioneer helper for - instructions that need a segment:offset pair - and do not have an immediate operand of specified size. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/rm = mod/reg/rm unpacked byte - op8 = function to call for emulation of instruction, given 8-bit operand "src" - op16 = function to call for emulation of instruction, given 16-bit operand "src" - op32 = function to call for emulation of instruction, given 32-bit operand "src" - - CALL FAR WORD PTR [2045h] -*/ -void sx86_exec_full_modrmonly_callfar(softx86_ctx* ctx,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte rm,void (*op16)(softx86_ctx* ctx,sx86_uword seg,sx86_uword ofs),void (*op32)(softx86_ctx* ctx,sx86_udword seg,sx86_udword ofs)) -{ - if (mod == 3) { /* immediate <-> register */ - // invalid, since a seg:off pair does not fit in a register - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - { - sx86_uword rmv,rmv2; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); lo += 2; - softx86_fetch(ctx,NULL,lo,&rmv2,2); - SWAP_WORD_FROM_LE(rmv); - SWAP_WORD_FROM_LE(rmv2); - op16(ctx,rmv2,rmv); - } - } -} - -/* general purpose mod/reg/rm executioneer helper for - the XCHG instruction. - - this is provided to avoid copy and pasting this source code into the emulation - code for *EVERY* instruction. - - ctx = CPU context - w16 = 16-bit operand flag - d32 = 386+ 32-bit data size override (ignored if w16 == 0) - mod/reg/rm = mod/reg/rm unpacked byte -*/ -void sx86_exec_full_modregrm_xchg(softx86_ctx* ctx,sx86_ubyte w16,sx86_ubyte d32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm) -{ - if (mod == 3) { /* register <-> register */ - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword tmp; - - tmp = ctx->state->general_reg[reg].w.lo; - ctx->state->general_reg[reg].w.lo = ctx->state->general_reg[rm].w.lo; - ctx->state->general_reg[rm].w.lo = tmp; - } - else { - sx86_ubyte tmp; - - tmp = *(ctx->__private->ptr_regs_8reg[reg]); - *(ctx->__private->ptr_regs_8reg[reg]) = *(ctx->__private->ptr_regs_8reg[rm]); - *(ctx->__private->ptr_regs_8reg[rm]) = tmp; - } - } - else { /* register <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - if (w16) { - sx86_uword tmp,mem; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&mem,2); - SWAP_WORD_FROM_LE(mem); - tmp = ctx->state->general_reg[reg].w.lo; - SWAP_WORD_TO_LE(tmp); - softx86_write(ctx,NULL,lo,&tmp,2); - ctx->state->general_reg[reg].w.lo = mem; - } - else { - sx86_ubyte tmp,mem; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&mem,1); - tmp = *(ctx->__private->ptr_regs_8reg[reg]); - softx86_write(ctx,NULL,lo,&tmp,1); - *(ctx->__private->ptr_regs_8reg[reg]) = mem; - } - } -} - -int softx86_parity8(sx86_ubyte ret) -{ - int b,p; - - p=1; - for (b=0;b < 8;b++) { - p ^= (ret&1); - ret >>= 1; - } - - return p; -} - -int softx86_parity16(sx86_uword ret) -{ - int b,p; - - p=1; - for (b=0;b < 16;b++) { - p ^= (ret&1); - ret >>= 1; - } - - return p; -} - -int softx86_parity32(sx86_udword ret) -{ - int b,p; - - p=1; - for (b=0;b < 32;b++) { - p ^= (ret&1); - ret >>= 1; - } - - return p; -} - -int softx86_parity64(sx86_uldword ret) -{ - int b,p; - - p=1; - for (b=0;b < 64;b++) { - p ^= (ret&1); - ret >>= 1; - } - - return p; -} - -void sx86_exec_full_modrmonly_memx(softx86_ctx* ctx,sx86_ubyte mod,sx86_ubyte rm,int sz,void (*op64)(softx86_ctx* ctx,char *datz,int sz)) -{ - if (sz > 16) - return; - - if (mod == 3) { /* immediate <-> register */ - // invalid - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - { - sx86_ubyte tmp[16]; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,tmp,sz); - op64(ctx,(char*)tmp,sz); - } - } -} - -void sx86_exec_full_modrw_memx(softx86_ctx* ctx,sx86_ubyte mod,sx86_ubyte rm,int sz,void (*op64)(softx86_ctx* ctx,char *datz,int sz)) -{ - if (sz > 16) - return; - - if (mod == 3) { /* immediate <-> register */ - // invalid - } - else { /* immediate <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - // TODO: For 386+ 32-bit instructions... if (d32) {...} - { - sx86_ubyte tmp[16]; - - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,tmp,sz); - op64(ctx,(char*)tmp,sz); - softx86_write(ctx,NULL,lo,tmp,sz); - } - } -} - -/* general purpose mod/segreg/rm executioneer helper for - instructions that modify the destination operand. - - this is provided to avoid copy and pasting this source code into the emulation - of *EVERY* instruction. - - ctx = CPU context - mod/reg/rm = mod/reg/rm unpacked byte - op16 = function to call for emulation of instruction, given 16-bit operands "src" and "dst" - - MOV AX,ES - MOV CS,BX - MOV ES,WORD PTR [3939h] - MOV WORD PTR [9393h],DS -*/ -void sx86_exec_full_modsregrm_rw(softx86_ctx* ctx,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,sx86_ubyte opswap,sx86_uword (*op16)(softx86_ctx* ctx,sx86_uword src,sx86_uword val)) -{ - sx86_uword regv,rmv; - -/* because not all segreg values are valid, check validity now! */ - if (reg >= 4) { /* the 8086 does not have FS and GS */ -/* TODO: Invalid opcode exception */ - return; - } - - if (mod == 3) { /* segment register <-> register */ - regv = ctx->state->segment_reg[reg].val; - rmv = ctx->state->general_reg[rm].w.lo; - - if (opswap) { -/* REMEMBER: WE NEVER DIRECTLY MODIFY THE SEGMENT REGISTER VALUES! */ -/* *(ctx->ptr_segregs[reg]) = - op16(ctx,rmv,regv); */ - softx86_setsegval(ctx,reg,rmv); - } - else { - ctx->state->general_reg[rm].w.lo = - op16(ctx,rmv,regv); - } - } - else { /* segment register <-> memory */ - sx86_uword seg,ofs; - sx86_udword lo; - - if (!ctx->state->is_segment_override) -/* apparently if BP is used (i.e. [BP+BX]) the stack segment is assumed. */ - if ((rm == 2 || rm == 3) || (rm == 6 && (mod == 1 || mod == 2))) - seg = ctx->state->segment_reg[SX86_SREG_SS].val; - else - seg = ctx->state->segment_reg[SX86_SREG_DS].val; - else - seg = ctx->state->segment_override; - -/* figure out the memory address */ - if (mod == 0) { - if (rm == 6) { - ofs = softx86_fetch_exec_byte(ctx); - ofs |= softx86_fetch_exec_byte(ctx)<<8; - } - else if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - } - else { - sx86_uword xx; - - if (rm == 0) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 1) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 2) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 3) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo + - ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 4) - ofs = ctx->state->general_reg[SX86_REG_SI].w.lo; - else if (rm == 5) - ofs = ctx->state->general_reg[SX86_REG_DI].w.lo; - else if (rm == 6) - ofs = ctx->state->general_reg[SX86_REG_BP].w.lo; - else if (rm == 7) - ofs = ctx->state->general_reg[SX86_REG_BX].w.lo; - - if (mod == 1) { - xx = softx86_fetch_exec_byte(ctx); - if (xx & 0x80) xx |= 0xFF00; - } - else { - xx = softx86_fetch_exec_byte(ctx); - xx |= softx86_fetch_exec_byte(ctx)<<8; - } - - ofs = FORCE_WORD_SIZE(ofs + xx); - } - - regv = ctx->state->segment_reg[reg].val; - lo = sx86_far_to_linear(ctx,seg,ofs); - softx86_fetch(ctx,NULL,lo,&rmv,2); - SWAP_WORD_FROM_LE(rmv); - - if (opswap) { -/* REMEMBER: WE NEVER DIRECTLY MODIFY THE SEGMENT REGISTER VALUES! */ -/* *(ctx->ptr_segregs[reg]) = - op16(ctx,rmv,regv); */ - softx86_setsegval(ctx,reg,rmv); - } - else { - rmv = op16(ctx,rmv,regv); - SWAP_WORD_TO_LE(rmv); - softx86_write(ctx,NULL,lo,&rmv,2); - } - } -} - -/* basic mod/reg/rm full-use decompiling. - ctx = CPU context struct - is_word = word value - dat32 = 32-bit 386+ data override - mod/reg/rm - op1 = buffer for r/m - op2 = buffer for reg */ -void sx86_dec_full_modregrm(softx86_ctx* ctx,sx86_ubyte is_word,sx86_ubyte dat32,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,char* op1,char* op2) -{ - sx86_uword o; - - if (is_word) - if (dat32) - sprintf(op2,"%s",sx86_regs32[reg]); - else - sprintf(op2,"%s",sx86_regs16[reg]); - else - sprintf(op2,"%s",sx86_regs8[reg]); - - if (mod == 3) { /* destination: register */ - if (is_word) - if (dat32) - sprintf(op1,"%s",sx86_regs32[rm]); - else - sprintf(op1,"%s",sx86_regs16[rm]); - else - sprintf(op1,"%s",sx86_regs8[rm]); - } - else if (mod == 0) { /* destination: memory address */ - if (rm == 6) { - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(op1,"[%04Xh]",o); - } - else { - sprintf(op1,"[%s]",sx86_regsaddr16_16[rm]); - } - } - else { /* destination: memory address + offset */ - if (mod == 1) { - o = softx86_fetch_dec_byte(ctx); - if (o & 0x80) o |= 0xFF00; - } - else if (mod == 2) { - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - } - - sprintf(op1,"[%s+%04Xh]",sx86_regsaddr16_16[rm],o); - } -} - -/* basic mod/rm full-use decompiling (reg used for another purpose) - ctx = CPU context struct - is_word = word value - dat32 = 32-bit 386+ data override - mod/rm - op1 = buffer for r/m */ -void sx86_dec_full_modrmonly(softx86_ctx* ctx,sx86_ubyte is_word,sx86_ubyte dat32,sx86_ubyte mod,sx86_ubyte rm,char* op1) -{ - sx86_uword o; - - if (mod == 3) { /* destination: register */ - if (is_word) - if (dat32) - sprintf(op1,"%s",sx86_regs32[rm]); - else - sprintf(op1,"%s",sx86_regs16[rm]); - else - sprintf(op1,"%s",sx86_regs8[rm]); - } - else if (mod == 0) { /* destination: memory address */ - if (rm == 6) { - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(op1,"[%04Xh]",o); - } - else { - sprintf(op1,"[%s]",sx86_regsaddr16_16[rm]); - } - } - else { /* destination: memory address + offset */ - if (mod == 1) { - o = softx86_fetch_dec_byte(ctx); - if (o & 0x80) o |= 0xFF00; - } - else if (mod == 2) { - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - } - - sprintf(op1,"[%s+%04Xh]",sx86_regsaddr16_16[rm],o); - } -} - -/* basic mod/segreg/rm full-use decompiling. - ctx = CPU context struct - is_word = word value - dat32 = 32-bit 386+ data override - mod/reg/rm where "reg" refers to a segment register - op1 = buffer for r/m - op2 = buffer for reg */ -void sx86_dec_full_modsregrm(softx86_ctx* ctx,sx86_ubyte mod,sx86_ubyte reg,sx86_ubyte rm,char* op1,char* op2) -{ - sx86_uword o; - - sprintf(op2,"%s",sx86_segregs[reg]); - - if (mod == 3) { /* destination: register */ - sprintf(op1,"%s",sx86_regs16[rm]); - } - else if (mod == 0) { /* destination: memory address */ - if (rm == 6) { - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - sprintf(op1,"[%04Xh]",o); - } - else { - sprintf(op1,"[%s]",sx86_regsaddr16_16[rm]); - } - } - else { /* destination: memory address + offset */ - if (mod == 1) { - o = softx86_fetch_dec_byte(ctx); - if (o & 0x80) o |= 0xFF00; - } - else if (mod == 2) { - o = softx86_fetch_dec_byte(ctx); - o |= softx86_fetch_dec_byte(ctx)<<8; - } - - sprintf(op1,"[%s+%04Xh]",sx86_regsaddr16_16[rm],o); - } -} - diff --git a/lib/3rdparty/softx86/softx86/softx86_dll.def b/lib/3rdparty/softx86/softx86/softx86_dll.def deleted file mode 100644 index 23ca962dcd8..00000000000 --- a/lib/3rdparty/softx86/softx86/softx86_dll.def +++ /dev/null @@ -1,52 +0,0 @@ - -LIBRARY SOFTX86 -EXPORTS softx86_bswap2 - softx86_bswap4 - softx86_init - softx86_free - softx86_step - softx86_decompile - softx86_decompile_exec_cs_ip - softx86_stack_popw - softx86_stack_discard_n - softx86_stack_add_n - softx86_stack_pushw - softx86_fetch - softx86_write - softx86_fetch_exec_byte - softx86_fetch_dec_byte - softx86_setsegval - softx86_set_instruction_ptr - softx86_set_instruction_dec_ptr - softx86_set_stack_ptr - softx86_set_near_instruction_ptr - softx86_reset - softx86_getversion - softx86_parity8 - softx86_parity16 - softx86_parity32 - softx86_parity64 - softx86_ext_hw_signal - softx86_ext_hw_ack - softx86_int_sw_signal - softx86_ext_hw_nmi_signal - softx86_ext_hw_nmi_ack - sx86_exec_full_modregrm_rw - sx86_exec_full_modregrm_ro - sx86_exec_full_modsregrm_rw - sx86_exec_full_modrmonly_rw - sx86_exec_full_modrmonly_rw_imm - sx86_exec_full_modrmonly_rw_imm8 - sx86_exec_full_modrmonly_ro_imm - sx86_exec_full_modregrm_xchg - sx86_exec_full_modregrm_lea - sx86_exec_full_modrmonly_callfar - sx86_exec_full_modrmonly_ro - sx86_exec_full_modrmonly_wo - sx86_exec_full_modregrm_far - sx86_exec_full_modregrm_far_ro3 - sx86_exec_full_modrmonly_memx - sx86_exec_full_modrw_memx - sx86_dec_full_modrmonly - sx86_dec_full_modregrm - sx86_dec_full_modsregrm diff --git a/lib/3rdparty/softx86/softx86/softx86_dll.dsp b/lib/3rdparty/softx86/softx86/softx86_dll.dsp deleted file mode 100644 index 6e786f13b01..00000000000 --- a/lib/3rdparty/softx86/softx86/softx86_dll.dsp +++ /dev/null @@ -1,109 +0,0 @@ -# Microsoft Developer Studio Project File - Name="softx86_dll" - Package Owner=<4> -# Microsoft Developer Studio Generated Build File, Format Version 6.00 -# ** DO NOT EDIT ** - -# TARGTYPE "Win32 (x86) Dynamic-Link Library" 0x0102 - -CFG=softx86_dll - Win32 Debug -!MESSAGE This is not a valid makefile. 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-SOURCE=.\prefixes.h -# End Source File -# Begin Source File - -SOURCE=.\procframe.h -# End Source File -# Begin Source File - -SOURCE=.\pushpop.h -# End Source File -# Begin Source File - -SOURCE=.\shovel.h -# End Source File -# Begin Source File - -SOURCE=..\include\softx86.h -# End Source File -# Begin Source File - -SOURCE=..\include\softx86cfg.h -# End Source File -# End Group -# Begin Source File - -SOURCE=..\readme.txt -# End Source File -# End Target -# End Project diff --git a/lib/3rdparty/softx86/softx86_ros.diff b/lib/3rdparty/softx86/softx86_ros.diff deleted file mode 100644 index 75026a2911b..00000000000 --- a/lib/3rdparty/softx86/softx86_ros.diff +++ /dev/null @@ -1,64 +0,0 @@ -Index: softx86/optable.c -=================================================================== ---- softx86/optable.c (révision 59247) -+++ softx86/optable.c (copie de travail) -@@ -217,9 +217,9 @@ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x66 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x67 */ - -- {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x68 */ -+ {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x68 */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x69 */ -- {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6A */ -+ {Sfx86OpcodeExec_push, Sfx86OpcodeDec_push}, /* 0x6A */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6B */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6C */ - {Sfx86OpcodeExec_default, Sfx86OpcodeDec_default}, /* 0x6D */ -Index: softx86/pushpop.c -=================================================================== ---- softx86/pushpop.c (révision 59247) -+++ softx86/pushpop.c (copie de travail) -@@ -167,6 +167,21 @@ - return 1; - } - -+ if (opcode == 0x6A) // PUSH imm8 -+ { -+ sx86_ubyte b = softx86_fetch_exec_byte(ctx); -+ softx86_stack_pushw(ctx, (sx86_uword)b); -+ return 1; -+ } -+ -+ if (opcode == 0x68) // PUSH imm16 -+ { -+ sx86_uword w = softx86_fetch_exec_byte(ctx); -+ w |= softx86_fetch_exec_byte(ctx) << 8; -+ softx86_stack_pushw(ctx, w); -+ return 1; -+ } -+ - return 0; - } - -@@ -202,6 +217,21 @@ - return 1; - } - -+ if (opcode == 0x6A && ctx->__private->level >= SX86_CPULEVEL_80186) // PUSH imm8 -+ { -+ sx86_ubyte b = softx86_fetch_exec_byte(ctx); -+ sprintf(buf, "PUSH %02Xh", b); -+ return 1; -+ } -+ -+ if (opcode == 0x68 && ctx->__private->level >= SX86_CPULEVEL_80186) // PUSH imm16 -+ { -+ sx86_uword w = softx86_fetch_exec_byte(ctx); -+ w |= softx86_fetch_exec_byte(ctx) << 8; -+ sprintf(buf, "PUSH %04Xh", w); -+ return 1; -+ } -+ - return 0; - } - diff --git a/lib/3rdparty/softx86/softx87/CMakeLists.txt b/lib/3rdparty/softx86/softx87/CMakeLists.txt deleted file mode 100644 index 429867e0bb0..00000000000 --- a/lib/3rdparty/softx86/softx87/CMakeLists.txt +++ /dev/null @@ -1,13 +0,0 @@ - -include_directories(${REACTOS_SOURCE_DIR}/include/reactos/libs/softx86) - -list(APPEND SOURCE - optable.c - softx87.c -### Uncomment the following files for dll compilation: -# windll.c -# softx87_dll.def -# softx87_dll.rc -) - -add_library(softx87 ${SOURCE}) diff --git a/lib/3rdparty/softx86/softx87/Makefile b/lib/3rdparty/softx86/softx87/Makefile deleted file mode 100644 index a2ae6b25b00..00000000000 --- a/lib/3rdparty/softx86/softx87/Makefile +++ /dev/null @@ -1,41 +0,0 @@ -# SOFTX87 Makefile for Linux/GCC 3.xx -# (C) 2003 Jonathan Campbell -# -# NOTE: Assumes subdirectory ./obj/ and places all object files there -# rather than mix them up with the source code. It's less messy -# that way. The only exception is the final output, softx86.o. - -all:: __obj ../lib/libsoftx87.a ../lib/libsoftx87.so - -ALL_OBJS = obj/optable.o obj/softx87.o - -INCLUDZ = -I../include - -clean:: - rm -f $(ALL_OBJS) - -distclean:: clean - rm -f ../lib/libsoftx87.a - rm -f ../lib/libsoftx87.so - if [[ -d obj ]]; then rmdir obj; fi - if [[ -d Release ]]; then rm -R Release; fi - if [[ -d Debug ]]; then rm -R Debug; fi - rm -f *.plg - rm -f *.aps - -# make sure there is an "obj" subdirectory -__obj: - if [[ !(-d obj) ]]; then mkdir obj; fi - -../lib/libsoftx87.a: $(ALL_OBJS) - ld -aarchive -r -o ../lib/libsoftx87.a $(ALL_OBJS) - -../lib/libsoftx87.so: $(ALL_OBJS) - ld -shared -o ../lib/libsoftx87.so $(ALL_OBJS) - -obj/optable.o: optable.c - gcc $(INCLUDZ) -c -o obj/optable.o optable.c - -obj/softx87.o: softx87.c - gcc $(INCLUDZ) -c -o obj/softx87.o softx87.c - diff --git a/lib/3rdparty/softx86/softx87/optab87.h b/lib/3rdparty/softx86/softx87/optab87.h deleted file mode 100644 index 2e3d2ca0dda..00000000000 --- a/lib/3rdparty/softx86/softx87/optab87.h +++ /dev/null @@ -1,26 +0,0 @@ - -// return value: -// 0 = opcode not recognized -// 1 = opcode recognized, parsing complete -// 2 = opcode recognized, more parsing needed (i.e., prefix) -typedef int (*Sfx87OpcodeExec)(sx86_ubyte opcode,softx87_ctx* ctx); -typedef int (*Sfx87OpcodeDec)(sx86_ubyte opcode,softx87_ctx* ctx,char buf[128]); - -typedef struct { - Sfx87OpcodeExec exec; - Sfx87OpcodeDec dec; -} Sfx87Opcode; - -/* for sanity's sake we only look at the - upper 3 bits of the 11-bit opcode. - the opcode arrangement of FPU opcodes - makes a lot less sense than the CPU - opcode arrangement. */ -typedef struct { - Sfx87Opcode table[8]; -} Sfx87OpcodeTable; - -extern Sfx87OpcodeTable optab8087; - -extern char s87op1_tmp[32]; -extern char s87op2_tmp[32]; diff --git a/lib/3rdparty/softx86/softx87/optable.c b/lib/3rdparty/softx86/softx87/optable.c deleted file mode 100644 index c50f7e16750..00000000000 --- a/lib/3rdparty/softx86/softx87/optable.c +++ /dev/null @@ -1,1994 +0,0 @@ -/* - * optable.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Opcode jumptable. - * - * Allows the recognition of many opcodes without having to write approximately - * 500+ if...then...else statements which is a) inefficient and b) apparently can - * cause some compilers such as Microsoft C++ to crash during the compile stage with - * an error. Since it's a table, it can be referred to via a pointer that can be easily - * redirected to other opcode tables (i.e., one for the 8086, one for the 80286, etc.) - * without much hassle. - * - * The table contains two pointers: one for an "execute" function, and one for a - * "decompile" function. The execute function is given the context and the initial opcode. - * If more opcodes are needed the function calls softx86_fetch_exec_byte(). The decode - * function is also given the opcode but also a char[] array where it is expected to - * sprintf() or strcpy() the disassembled output. If that function needs more opcodes - * it calls softx86_fetch_dec_byte(). - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include -#include "optab87.h" - -void op_fcom(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src); -void op_fadd(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src); -void op_fsub(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src); -void op_fdiv(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src); -void op_fdivr(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src); - -char s87op1_tmp[32]; -char s87op2_tmp[32]; - -/* pops value from FPU stack */ -void softx86_popstack(softx87_ctx* ctx87) -{ - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - SX87_FPUTAGW_TAG_SET(ctx87->state.tag_word,TOP,SX87_FPUTAGVAL_EMPTY); - TOP = (TOP+1)&7; - SX87_FPUSTAT_TOP_SET(ctx87->state.status_word,TOP); -} - -/* given an FPU register, convert to an integer */ -sx86_uldword sx87_getint(softx87_reg80 *r) -{ - sx86_uldword m; - sx86_uword e; - -// TODO: take into consideration the rounding mode - e = 63 - (r->exponent - 16383); - if (e > 63) { - m = 0; - } - else if (e > 0) { - // TODO: rounding mode? - m = r->mantissa >> ((sx86_uldword)(e)); - } - else if (e < 0) { - sx86_uldword n; - -/* first figure out if bits will be shifted out (too large). - if that's the case compensate by setting the mantissa to - the largest possible __uint64 value. */ - n = ((sx86_uldword)-1) << ((sx86_uldword)(63 + e)); - if (((sx86_uldword)(r->mantissa & n)) != ((sx86_uldword)0)) - m = (sx86_uldword)-1; - else - m = r->mantissa << ((sx86_uldword)(-e)); - } - else { - m = r->mantissa; - } - - return m; -} - -/* FBSTP 80 */ -void op_fbstp80(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - int i; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 10 || !ctx87) return; - - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - -/* TODO: check and perform cases as documented: - --infinity = #IA exception --infinity = #IA exception - - TODO: what do we do really if the entry is empty? -*/ - tmp.sign_bit = ctx87->state.st[TOP].sign_bit; - tmp.mantissa = ctx87->state.st[TOP].mantissa; - tmp.exponent = ctx87->state.st[TOP].exponent; - -/* shift data around to produce integer version. */ -/* if it's too large, clip it */ - tmp.mantissa = sx87_getint(&tmp); - -/* if too large for BCD coding, clip it. */ - if (tmp.mantissa > 999999999999999999) /* 18 digits usable, so... */ - tmp.mantissa = 999999999999999999; /* clip if >= 10^19 */ - -/* put it out there */ - for (i=0;i < 9;i++) { - datz[i] = (char)(tmp.mantissa % ((sx86_uldword)10)); - tmp.mantissa /= (sx86_uldword)10; - datz[i] |= ((char)(tmp.mantissa % ((sx86_uldword)10)))<<4; - tmp.mantissa /= (sx86_uldword)10; - } - - datz[9] = tmp.sign_bit ? ((char)0x80) : 0x00; - -/* pop */ - softx86_popstack(ctx->ref_softx87_ctx); -} - -/* the hard work behind FLD [mem32] is here */ -void op_fld32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx87->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx87->state.status_word |= SX87_FPUSTAT_C1; - else - ctx87->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx87->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx87->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store */ - ctx87->state.st[TOP].exponent = tmp.exponent; - ctx87->state.st[TOP].mantissa = tmp.mantissa; - ctx87->state.st[TOP].sign_bit = tmp.sign_bit; -} - -/* the hard work behind FLD [mem64] is here */ -void op_fld64(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 8 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp64(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx87->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx87->state.status_word |= SX87_FPUSTAT_C1; - else - ctx87->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx87->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx87->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store */ - ctx87->state.st[TOP].exponent = tmp.exponent; - ctx87->state.st[TOP].mantissa = tmp.mantissa; - ctx87->state.st[TOP].sign_bit = tmp.sign_bit; -} - -/* FIADD [mem16] */ -void op_fiadd16(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 2 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int16(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fadd(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FICOM [mem16] */ -void op_ficom16(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 2 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int16(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fcom(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FICOMP [mem16] */ -void op_ficomp16(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 2 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int16(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fcom(ctx87,&ctx87->state.st[TOP],&tmp); - softx86_popstack(ctx87); -} - -/* FICOM [mem32] */ -void op_ficom32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fcom(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FICOMP [mem32] */ -void op_ficomp32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fcom(ctx87,&ctx87->state.st[TOP],&tmp); - softx86_popstack(ctx87); -} - -/* FISUB [mem16] */ -void op_fisub16(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 2 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int16(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fsub(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FIADD [mem32] */ -void op_fiadd32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fadd(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FISUB [mem32] */ -void op_fisub32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fsub(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FIDIV [mem32] */ -void op_fidiv32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdiv(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FIDIVR [mem32] */ -void op_fidivr32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdivr(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FIDIV [mem16] */ -void op_fidiv16(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 2 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int16(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdiv(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FIDIVR [mem16] */ -void op_fidivr16(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 2 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_int16(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdivr(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FADD [mem32] */ -void op_fadd32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fadd(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FDIV [mem32] */ -void op_fdiv32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdiv(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FDIVR [mem32] */ -void op_fdivr32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdivr(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FDIVR [mem64] */ -void op_fdivr64(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 8 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp64(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdivr(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FDIV [mem64] */ -void op_fdiv64(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 8 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp64(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fdiv(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FSUB [mem32] */ -void op_fsub32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp32(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fsub(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FADD [mem64] */ -void op_fadd64(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 8 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp64(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fadd(ctx87,&ctx87->state.st[TOP],&tmp); -} - -/* FSUB [mem64] */ -void op_fsub64(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 8 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp64(ctx87,datz,&tmp); -/* normalize */ - softx87_normalize(ctx87,&tmp); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - op_fsub(ctx87,&ctx87->state.st[TOP],&tmp); -} - -static void op_fcom_compflags(softx87_ctx* ctx,softx87_reg80 *diff) -{ - if (diff->mantissa == 0) { // equal (basically zero no matter what the exponent) - ctx->state.status_word |= SX87_FPUSTAT_C3; - ctx->state.status_word &= ~(SX87_FPUSTAT_C2 | SX87_FPUSTAT_C0); - } - else if (diff->sign_bit == 1) { // st0 < src - ctx->state.status_word |= SX87_FPUSTAT_C0; - ctx->state.status_word &= ~(SX87_FPUSTAT_C3 | SX87_FPUSTAT_C2); - } - else if (diff->sign_bit == 0) { // st0 > src - ctx->state.status_word &= ~(SX87_FPUSTAT_C3 | SX87_FPUSTAT_C2 | SX87_FPUSTAT_C0); - } - else { - // TODO - } -} - -/* FCOM [mem64] */ -void op_fcom64(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 src; - softx87_reg80 st0; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 8 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp64(ctx87,datz,&src); -/* normalize */ - softx87_normalize(ctx87,&src); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - memcpy(&st0,&ctx87->state.st[TOP],sizeof(softx87_reg80)); - softx87_normalize(ctx87,&st0); - op_fsub(ctx87,&st0,&src); // st0 -= src - -/* what is the result? */ - op_fcom_compflags(ctx87,&st0); -} - -/* FCOMP [mem64] */ -void op_fcomp64(softx86_ctx* ctx,char *datz,int sz) -{ - op_fcom64(ctx,datz,sz); - softx86_popstack(ctx->ref_softx87_ctx); -} - -/* FCOM [mem32] */ -void op_fcom32(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 src; - softx87_reg80 st0; - softx87_ctx* ctx87; - int TOP; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 4 || !ctx87) return; - -/* convert to 80-bit floating point */ - softx87_unpack_raw_fp32(ctx87,datz,&src); -/* normalize */ - softx87_normalize(ctx87,&src); - -/* do it */ - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); - memcpy(&st0,&ctx87->state.st[TOP],sizeof(softx87_reg80)); - softx87_normalize(ctx87,&st0); - op_fsub(ctx87,&st0,&src); // st0 -= src - -/* what is the result? */ - op_fcom_compflags(ctx87,&st0); -} - -/* FCOMP [mem32] */ -void op_fcomp32(softx86_ctx* ctx,char *datz,int sz) -{ - op_fcom32(ctx,datz,sz); - softx86_popstack(ctx->ref_softx87_ctx); -} - -/* FBLD [mem80] */ -void op_fbld80(softx86_ctx* ctx,char *datz,int sz) -{ - softx87_reg80 tmp; - softx87_ctx* ctx87; - int TOP,i; - -/* sanity check */ - ctx87 = (softx87_ctx*)ctx->ref_softx87_ctx; - if (sz != 10 || !ctx87) return; - -/* think of it as a string where each character is stored in one nibble - representing one digit. UNFORTUNATELY it's also stored backwards... */ - if (datz[9] & 0x80) tmp.sign_bit = 1; - else tmp.sign_bit = 0; - - tmp.exponent = 16383 + 63; - tmp.mantissa = (sx86_uldword)0; - for (i=17;i >= 0;i--) { - tmp.mantissa *= (sx86_uldword)10; - tmp.mantissa += (sx86_uldword)((datz[i>>1] >> ((i&1)*4))&0xF); - } - -/* normalize */ - softx87_normalize(ctx87,&tmp); - - TOP = SX87_FPUSTAT_TOP(ctx87->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx87->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx87->state.status_word |= SX87_FPUSTAT_C1; - else - ctx87->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx87->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx87->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store */ - ctx87->state.st[TOP].exponent = tmp.exponent; - ctx87->state.st[TOP].mantissa = tmp.mantissa; - ctx87->state.st[TOP].sign_bit = tmp.sign_bit; -} - -/* general purpose FADD */ -void op_fadd(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src) -{ - softx87_reg80 major; - softx87_reg80 minor; - sx87_uldword waste,threshhold; - int exb; -/* TODO: check and perform cases as documented: - --infinity + (anything) = -infinity --infinity + +infinity = #IA exception -NaN + (anything) = NaN -*/ - -/* in doing this... how many extra bits will we need? */ - exb = (int)(src->mantissa>>((sx87_uldword)63)); - exb |= (int)(dst->mantissa>>((sx87_uldword)63)); - if (src->sign_bit != dst->sign_bit) exb++; -/* avoid addition if it wouldn't make any difference */ - if (dst->exponent >= (src->exponent+(64-exb))) - return; -/* copy src => dst if the destination value is dwarfed by the source value */ - else if (dst->exponent <= (src->exponent-(64-exb))) { - memcpy(dst,src,sizeof(softx87_reg80)); - return; - } - -/* scale them up so their exponents match */ - if (dst->exponent > src->exponent) { - memcpy(&major,dst,sizeof(softx87_reg80)); - memcpy(&minor,src,sizeof(softx87_reg80)); - } - else if (dst->exponent < src->exponent) { - memcpy(&major,src,sizeof(softx87_reg80)); - memcpy(&minor,dst,sizeof(softx87_reg80)); - } - else { - memcpy(&major,dst,sizeof(softx87_reg80)); - memcpy(&minor,src,sizeof(softx87_reg80)); - } - -/* "major" should have the highest exponent */ - if ((major.exponent+exb) > minor.exponent) { - int b; - - b = (major.exponent - minor.exponent)+exb; - threshhold = (sx87_uldword)-1; - threshhold >>= (sx87_uldword)(64-b); - waste = minor.mantissa & threshhold; - threshhold = (threshhold+1)>>1; - -/* scale up the minor value */ - minor.exponent += b; - minor.mantissa >>= (sx87_uldword)b; -/* round it */ - switch (SX87_FPUCTRLW_RNDCTL(ctx->state.control_word)) - { - case SX87_FPUCTRLW_RNDCTL_NEAREST: - if (waste >= threshhold) minor.mantissa++; - break; - - case SX87_FPUCTRLW_RNDCTL_DOWNINF: - if (waste != 0L && minor.sign_bit) minor.mantissa++; - break; - - case SX87_FPUCTRLW_RNDCTL_UPINF: - if (waste != 0L && !minor.sign_bit) minor.mantissa++; - break; - - case SX87_FPUCTRLW_RNDCTL_ZERO: - /* nothing */ - break; - } - } - - if (exb > 0) { -/* scale up the major value */ - threshhold = (sx87_uldword)-1; - threshhold >>= (sx87_uldword)(64-exb); - waste = major.mantissa & threshhold; - threshhold = (threshhold+1)>>1; - - major.exponent += exb; - major.mantissa >>= (sx87_uldword)exb; -/* round it */ - switch (SX87_FPUCTRLW_RNDCTL(ctx->state.control_word)) - { - case SX87_FPUCTRLW_RNDCTL_NEAREST: - if (waste >= threshhold) major.mantissa++; - break; - - case SX87_FPUCTRLW_RNDCTL_DOWNINF: - if (waste != 0L && major.sign_bit) major.mantissa++; - break; - - case SX87_FPUCTRLW_RNDCTL_UPINF: - if (waste != 0L && !major.sign_bit) major.mantissa++; - break; - - case SX87_FPUCTRLW_RNDCTL_ZERO: - /* nothing */ - break; - } - } - - if (src->sign_bit == dst->sign_bit) { - /* simply add */ - dst->exponent = major.exponent; - dst->sign_bit = major.sign_bit; - dst->mantissa = minor.mantissa + major.mantissa; - } - else { - /* negate mantissa based on sign */ - if (minor.sign_bit) minor.mantissa = -minor.mantissa; - if (major.sign_bit) major.mantissa = -major.mantissa; - /* now add, treating 63rd bit as sign */ - dst->exponent = major.exponent; - dst->mantissa = minor.mantissa + major.mantissa; - dst->sign_bit = dst->mantissa>>((sx87_uldword)63); - if (dst->sign_bit) dst->mantissa = -dst->mantissa; - } - - softx87_normalize(ctx,dst); -} - -/* FCOM */ -void op_fcom(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src) -{ - softx87_reg80 st0; - - memcpy(&st0,dst,sizeof(softx87_reg80)); - softx87_normalize(ctx,&st0); - op_fsub(ctx,&st0,src); // st0 -= src - -/* what is the result? */ - op_fcom_compflags(ctx,&st0); -} - -/* FCOM */ -void op_fcomp(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src) -{ - softx87_reg80 st0; - - memcpy(&st0,dst,sizeof(softx87_reg80)); - softx87_normalize(ctx,&st0); - op_fsub(ctx,&st0,src); // st0 -= src - -/* what is the result? */ - op_fcom_compflags(ctx,&st0); - softx86_popstack(ctx); -} - -/* general purpose FSUB */ -void op_fsub(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src) -{ - softx87_reg80 stm; - -/* cheap trick for now ;) */ - memcpy(&stm,src,sizeof(softx87_reg80)); - stm.sign_bit=!stm.sign_bit; - op_fadd(ctx,dst,&stm); -} - -/* general purpose FDIV */ -void op_fdiv(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src) -{ - double x,y; - -// TODO: consideration for NaN, etc. -// TODO: make own dividing implementation, this is a cheap hack. - x = softx87_get_fpu_double(ctx,dst,NULL); - y = softx87_get_fpu_double(ctx,src,NULL); - x /= y; - softx87_set_fpu_double(ctx,dst,x); -} - -/* general purpose FDIVR */ -void op_fdivr(softx87_ctx* ctx,softx87_reg80 *dst,softx87_reg80 *src) -{ - double x,y; - -// TODO: consideration for NaN, etc. -// TODO: make own dividing implementation, this is a cheap hack. - x = softx87_get_fpu_double(ctx,dst,NULL); - y = softx87_get_fpu_double(ctx,src,NULL); - x = y / x; - softx87_set_fpu_double(ctx,dst,x); -} - -static int Sfx87OpcodeExec_group_D8(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* FADD ST(0),ST(i) */ - if (opcode >= 0xC0 && opcode < 0xC8) { - int st0,i; - - i = (int)(opcode-0xC0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fadd(ctx,&ctx->state.st[st0],&ctx->state.st[i]); -/* done */ - return 1; - } -/* FCOM ST(0),ST(i) */ - else if (opcode >= 0xD0 && opcode < 0xD8) { - int st0,i; - - i = (int)(opcode-0xD0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fcom(ctx,&ctx->state.st[st0],&ctx->state.st[i]); -/* done */ - return 1; - } -/* FCOMP ST(0),ST(i) */ - else if (opcode >= 0xD8 && opcode < 0xE0) { - int st0,i; - - i = (int)(opcode-0xD8); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fcomp(ctx,&ctx->state.st[st0],&ctx->state.st[i]); -/* done */ - return 1; - } -/* FSUB ST(0),ST(i) */ - else if (opcode >= 0xE0 && opcode < 0xE8) { - int st0,i; - - i = (int)(opcode-0xE0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fsub(ctx,&ctx->state.st[st0],&ctx->state.st[i]); -/* done */ - return 1; - } -/* FDIV ST(0),ST(i) */ - else if (opcode >= 0xF0 && opcode < 0xF8) { - int st0,i; - - i = (int)(opcode-0xF0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fdiv(ctx,&ctx->state.st[st0],&ctx->state.st[i]); -/* done */ - return 1; - } -/* FDIVR ST(0),ST(i) */ - else if (opcode >= 0xF8) { - int st0,i; - - i = (int)(opcode-0xF8); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fdivr(ctx,&ctx->state.st[st0],&ctx->state.st[i]); -/* done */ - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 0) /* FADD mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fadd32); - else if (reg == 2) /* FCOM mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fcom32); - else if (reg == 3) /* FCOMP mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fcomp32); - else if (reg == 4) /* FSUB mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fsub32); - else if (reg == 6) /* FDIV mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fdiv32); - else if (reg == 7) /* FDIVR mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fdivr32); - else - return 0; - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_D8(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* FADD ST(0),ST(i) */ - if (opcode >= 0xC0 && opcode < 0xC8) { - sprintf(buf,"FADD ST(0),ST(%d)",opcode-0xC0); - return 1; - } -/* FCOM ST(0),ST(i) */ - else if (opcode >= 0xD0 && opcode < 0xD8) { - sprintf(buf,"FCOM ST(0),ST(%d)",opcode-0xD0); - return 1; - } -/* FCOMP ST(0),ST(i) */ - else if (opcode >= 0xD8 && opcode < 0xE0) { - sprintf(buf,"FCOMP ST(0),ST(%d)",opcode-0xD8); - return 1; - } -/* FSUB ST(0),ST(i) */ - else if (opcode >= 0xE0 && opcode < 0xE8) { - sprintf(buf,"FSUB ST(0),ST(%d)",opcode-0xE0); - return 1; - } -/* FDIV ST(0),ST(i) */ - else if (opcode >= 0xF0 && opcode < 0xF8) { - sprintf(buf,"FDIV ST(0),ST(%d)",opcode-0xF0); - return 1; - } -/* FDIVR ST(0),ST(i) */ - else if (opcode >= 0xF8) { - sprintf(buf,"FDIVR ST(0),ST(%d)",opcode-0xF8); - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 0) - sprintf(buf,"FADD %s (mem32)",s87op1_tmp); - else if (reg == 2) - sprintf(buf,"FCOM %s (mem32)",s87op1_tmp); - else if (reg == 3) - sprintf(buf,"FCOMP %s (mem32)",s87op1_tmp); - else if (reg == 4) - sprintf(buf,"FSUB %s (mem32)",s87op1_tmp); - else if (reg == 6) - sprintf(buf,"FDIV %s (mem32)",s87op1_tmp); - else if (reg == 7) - sprintf(buf,"FDIVR %s (mem32)",s87op1_tmp); - else - return 0; - - return 1; - } - - buf[0]=0; - return 0; -} - -void sx87_rnd(softx87_reg80 *val) -{ -/* TODO: rounding modes */ - if (1) { - /* round to nearest */ - if (val->exponent < 16382) { - /* value is too small that val must be < 0.5 */ - val->mantissa = 0; - val->exponent = 16383; - val->sign_bit = 0; - } - else if (val->exponent > (16383+63)) { - /* value is too large to round */ - } - else { - sx87_uldword t,s,m,i; - - s = (sx87_uldword)(val->exponent-16382); - m = ((sx87_uldword)-1) >> s; - t = val->mantissa & m; - i = val->mantissa & (~m); -/* special case: when s == 0, m = 0xFFFFFFFFFFFFFFFF which can - overflow to 0 if incremented and shifted */ - if (s == 0) s = (sx87_uldword)0x8000000000000000L; - else s = (m + ((sx87_uldword)1)) >> ((sx87_uldword)1); -/* m = mask to obtain fractional part - t = fractional part - i = whole part - s = fractional part / 2 */ - if (t >= s) i++; - val->mantissa = i; - } - } -} - -static int Sfx87OpcodeExec_group_D9(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* FSCALE */ - if (opcode == 0xFD) { - sx86_uldword e; - int ST0,ST1; - - ST0 = SX87_FPUSTAT_TOP(ctx->state.status_word); - ST1 = (ST0 + 1) & 7; - - // TODO: cases with infinity, NaN, etc - e = sx87_getint(&ctx->state.st[ST1]); - e = ctx->state.st[ST0].exponent + e; - if (e < 0) { - ctx->state.st[ST0].exponent = 16383; - ctx->state.st[ST0].mantissa = 0; - } - else if (e > 0x7FFF) { - ctx->state.st[ST0].exponent = 0x7FFF; - ctx->state.st[ST0].mantissa = (sx86_uldword)(-1); - } - else { - ctx->state.st[ST0].exponent = (sx86_uword)(e); - } - - return 1; - } -/* FRNDINT */ - else if (opcode == 0xFC) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); - sx87_rnd(&ctx->state.st[TOP]); - return 1; - } -/* FINCSTP */ - else if (opcode == 0xF7) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement Top Of Stack. nothing is tagged empty. */ - TOP = (TOP+1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); -/* done */ - return 1; - } -/* FDECSTP */ - else if (opcode == 0xF6) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement Top Of Stack. nothing is tagged empty. */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); -/* done */ - return 1; - } -/* F2XM1 */ - else if (opcode == 0xF0) { - int TOP; - double v; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); - v = softx87_get_fpu_register_double(ctx,TOP,NULL); - /* NOTE: Intel says that this instruction is limited to domain -1.0 <= x <= 1.0 - and anything outside that is undefined..... so what? */ - // TODO: Make own implementation of exponential function - v = pow(2.0,v); - softx87_set_fpu_register_double(ctx,TOP,v); - return 1; - } -/* FLD1 */ - else if (opcode == 0xE8) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store */ - ctx->state.st[TOP].exponent = 16383 + 63; - ctx->state.st[TOP].mantissa = 1; - ctx->state.st[TOP].sign_bit = 0; - return 1; - } -/* FLDL2T */ - else if (opcode == 0xE9) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store log2(10) = 3.3219280948873623478703194294894 */ - softx87_set_fpu_register_double(ctx,TOP,(double)(3.3219280948873623478703194294894)); - return 1; - } -/* FLDL2E */ - else if (opcode == 0xEA) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store log2(e) = 1.4426950408889634073599246810019 */ - softx87_set_fpu_register_double(ctx,TOP,(double)(1.4426950408889634073599246810019)); - return 1; - } -/* FLDPI */ - else if (opcode == 0xEB) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store PI the way Intel documents it (IA-32 Intel Architecture SW dev vol 1, ch 8.3.8) */ - ctx->state.st[TOP].exponent = 16383 + 1; - ctx->state.st[TOP].mantissa = (sx86_uldword)(0xC90FDAA22168C234); // C90F DAA2 2168 C234 C - ctx->state.st[TOP].sign_bit = 0; - return 1; - } -/* FLDLG2 */ - else if (opcode == 0xEC) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store log10(2) = 0.30102999566398119521373889472449 */ - softx87_set_fpu_register_double(ctx,TOP,(double)(0.30102999566398119521373889472449)); - return 1; - } -/* FLDLN2 */ - else if (opcode == 0xED) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store ln(2) = 0.69314718055994530941723212145818 */ - softx87_set_fpu_register_double(ctx,TOP,(double)(0.69314718055994530941723212145818)); - return 1; - } -/* FLDZ */ - else if (opcode == 0xEE) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement TOP, tag as valid */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* store */ - ctx->state.st[TOP].exponent = 16383 + 63; - ctx->state.st[TOP].mantissa = 0; - ctx->state.st[TOP].sign_bit = 0; - return 1; - } -/* FABS */ - else if (opcode == 0xE1) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); - ctx->state.st[TOP].sign_bit = 0; - return 1; - } -/* FCHS */ - else if (opcode == 0xE0) { - int TOP; - - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); - ctx->state.st[TOP].sign_bit = !ctx->state.st[TOP].sign_bit; - return 1; - } -/* FNOP */ - else if (opcode == 0xD0) { - /* no-op */ - return 1; - } -/* FLD ST(i) */ - else if (opcode >= 0xC0 && opcode < 0xC8) { - int TOP,i; - - i = (int)(opcode-0xC0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - TOP = SX87_FPUSTAT_TOP(ctx->state.status_word); -/* set C1 if stack overflow */ - if (SX87_FPUTAGW_TAG(ctx->state.tag_word,TOP) != SX87_FPUTAGVAL_EMPTY) - ctx->state.status_word |= SX87_FPUSTAT_C1; - else - ctx->state.status_word &= ~SX87_FPUSTAT_C1; -/* decrement Top Of Stack, Tag as valid, and store */ - TOP = (TOP-1)&7; - SX87_FPUSTAT_TOP_SET(ctx->state.status_word,TOP); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,TOP,SX87_FPUTAGVAL_VALID); -/* copy */ - ctx->state.st[TOP].exponent = ctx->state.st[i].exponent; - ctx->state.st[TOP].mantissa = ctx->state.st[i].mantissa; - ctx->state.st[TOP].sign_bit = ctx->state.st[i].sign_bit; -/* done */ - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 0) /* FLD mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fld32); - else - return 0; - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_D9(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* FSCALE */ - if (opcode == 0xFD) { - strcpy(buf,"FSCALE"); - return 1; - } -/* FRNDINT */ - else if (opcode == 0xFC) { - strcpy(buf,"FRNDINT"); - return 1; - } -/* FINCSTP */ - else if (opcode == 0xF7) { - strcpy(buf,"FINCSTP"); - return 1; - } -/* FDECSTP */ - else if (opcode == 0xF6) { - strcpy(buf,"FDECSTP"); - return 1; - } -/* F2XM1 */ - else if (opcode == 0xF0) { - strcpy(buf,"F2XM1"); - return 1; - } -/* FLD1 */ - else if (opcode == 0xE8) { - strcpy(buf,"FLD1"); - return 1; - } -/* FLDL2T */ - else if (opcode == 0xE9) { - strcpy(buf,"FLDL2T"); - return 1; - } -/* FLDL2E */ - else if (opcode == 0xEA) { - strcpy(buf,"FLDL2E"); - return 1; - } -/* FLDPI */ - else if (opcode == 0xEB) { - strcpy(buf,"FLDPI"); - return 1; - } -/* FLDLG2 */ - else if (opcode == 0xEC) { - strcpy(buf,"FLDLG2"); - return 1; - } -/* FLDLN2 */ - else if (opcode == 0xED) { - strcpy(buf,"FLDLN2"); - return 1; - } -/* FLDZ */ - else if (opcode == 0xEE) { - strcpy(buf,"FLDZ"); - return 1; - } -/* FABS */ - else if (opcode == 0xE1) { - strcpy(buf,"FABS"); - return 1; - } -/* FCHS */ - else if (opcode == 0xE0) { - strcpy(buf,"FABS"); - return 1; - } -/* FNOP */ - else if (opcode == 0xD0) { - strcpy(buf,"FNOP"); - return 1; - } -/* FLD ST(i) */ - else if (opcode >= 0xC0 && opcode < 0xC8) { - sprintf(buf,"FLD ST(%d)",opcode-0xC0); - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 0) - sprintf(buf,"FLD %s (mem32)",s87op1_tmp); - else - return 0; - - return 1; - } - - buf[0]=0; - return 0; -} - -static int Sfx87OpcodeExec_group_DA(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* combo */ - if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 0) /* FIADD mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fiadd32); - else if (reg == 2) /* FICOM mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_ficom32); - else if (reg == 3) /* FICOMP mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_ficomp32); - else if (reg == 4) /* FISUB mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fisub32); - else if (reg == 6) /* FIDIV mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fidiv32); - else if (reg == 7) /* FIDIVR mem32 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,4,op_fidivr32); - else - return 0; - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_DA(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* combo */ - if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 0) - sprintf(buf,"FIADD %s (mem32)",s87op1_tmp); - else if (reg == 2) - sprintf(buf,"FICOM %s (mem32)",s87op1_tmp); - else if (reg == 3) - sprintf(buf,"FICOMP %s (mem32)",s87op1_tmp); - else if (reg == 4) - sprintf(buf,"FISUB %s (mem32)",s87op1_tmp); - else if (reg == 6) - sprintf(buf,"FIDIV %s (mem32)",s87op1_tmp); - else if (reg == 7) - sprintf(buf,"FIDIVR %s (mem32)",s87op1_tmp); - else - return 0; - - return 1; - } - - buf[0]=0; - return 0; -} - -static int Sfx87OpcodeExec_group_DB(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* FINIT a.k.a. FNINIT */ - if (opcode == 0xE3) { - softx87_finit_setup(ctx); - return 1; - } -/* FCLEX a.k.a. FNCLEX */ - else if (opcode == 0xE2) { - ctx->state.status_word = 0; - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_DB(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* FINIT a.k.a. FNINIT */ - if (opcode == 0xE3) { - strcpy(buf,"FINIT"); - return 1; - } -/* FCLEX a.k.a. FNCLEX */ - else if (opcode == 0xE2) { - strcpy(buf,"FCLEX"); - return 1; - } - - buf[0]=0; - return 0; -} - -static int Sfx87OpcodeExec_group_DC(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* FADD ST(i),ST(0) */ - if (opcode >= 0xC0 && opcode < 0xC8) { - int st0,i; - - i = (int)(opcode-0xC0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fadd(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* done */ - return 1; - } -/* FSUB ST(i),ST(0) */ - else if (opcode >= 0xE8 && opcode < 0xF0) { - int st0,i; - - i = (int)(opcode-0xE8); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fsub(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* done */ - return 1; - } -/* FDIVR ST(i),ST(0) */ - else if (opcode >= 0xF0 && opcode < 0xF8) { - int st0,i; - - i = (int)(opcode-0xF0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fdivr(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* done */ - return 1; - } -/* FDIV ST(i),ST(0) */ - else if (opcode >= 0xF8) { - int st0,i; - - i = (int)(opcode-0xF8); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fdiv(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* done */ - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 0) /* FADD mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fadd64); - else if (reg == 2) /* FCOM mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fcom64); - else if (reg == 3) /* FCOMP mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fcomp64); - else if (reg == 4) /* FSUB mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fsub64); - else if (reg == 6) /* FDIV mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fdiv64); - else if (reg == 7) /* FDIVR mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fdivr64); - else - return 0; - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_DC(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* FADD ST(i),ST(0) */ - if (opcode >= 0xC0 && opcode < 0xC8) { - sprintf(buf,"FADD ST(%d),ST(0)",opcode-0xC0); - return 1; - } -/* FSUB ST(i),ST(0) */ - else if (opcode >= 0xE8 && opcode < 0xF0) { - sprintf(buf,"FSUB ST(%d),ST(0)",opcode-0xE8); - return 1; - } -/* FDIVR ST(i),ST(0) */ - else if (opcode >= 0xF0 && opcode < 0xF8) { - sprintf(buf,"FDIVR ST(%d),ST(0)",opcode-0xF0); - return 1; - } -/* FDIV ST(i),ST(0) */ - else if (opcode >= 0xF8) { - sprintf(buf,"FDIV ST(%d),ST(0)",opcode-0xF8); - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 0) - sprintf(buf,"FADD %s (mem64)",s87op1_tmp); - else if (reg == 2) - sprintf(buf,"FCOM %s (mem64)",s87op1_tmp); - else if (reg == 3) - sprintf(buf,"FCOMP %s (mem64)",s87op1_tmp); - else if (reg == 4) - sprintf(buf,"FSUB %s (mem64)",s87op1_tmp); - else if (reg == 6) - sprintf(buf,"FDIV %s (mem64)",s87op1_tmp); - else if (reg == 7) - sprintf(buf,"FDIVR %s (mem64)",s87op1_tmp); - else - return 0; - - return 1; - } - - buf[0]=0; - return 0; -} - -static int Sfx87OpcodeExec_group_DD(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* combo */ - if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 0) /* FLD mem64 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,8,op_fld64); - else - return 0; - - return 1; - } -/* FFREE ST(i) */ - else if (opcode >= 0xC0 && opcode < 0xC8) { - int i; - - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),(int)(opcode-0xC0)); - SX87_FPUTAGW_TAG_SET(ctx->state.tag_word,i,SX87_FPUTAGVAL_EMPTY); - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_DD(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* combo */ - if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 0) - sprintf(buf,"FLD %s (mem64)",s87op1_tmp); - else - return 0; - - return 1; - } -/* FFREE ST(i) */ - else if (opcode >= 0xC0 && opcode < 0xC8) { - sprintf(buf,"FFREE ST(%d)",opcode-0xC0); - return 1; - } - - buf[0]=0; - return 0; -} - -static int Sfx87OpcodeExec_group_DE(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* FADDP ST(i),ST(0) */ - if (opcode >= 0xC0 && opcode < 0xC8) { - int st0,i; - - i = (int)(opcode-0xC0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fadd(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* pop */ - softx86_popstack(ctx); -/* done */ - return 1; - } -/* FCOMPP ST(0),ST(1) */ - else if (opcode == 0xD9) { - int st0,i; - - i = (int)(opcode-0xD9); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fcom(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* pop */ - softx86_popstack(ctx); - softx86_popstack(ctx); -/* done */ - return 1; - } -/* FSUBP ST(i),ST(0) */ - else if (opcode >= 0xE8 && opcode < 0xEF) { - int st0,i; - - i = (int)(opcode-0xE8); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fsub(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* pop */ - softx86_popstack(ctx); -/* done */ - return 1; - } -/* FDIVRP ST(i),ST(0) */ - else if (opcode >= 0xF0 && opcode < 0xF8) { - int st0,i; - - i = (int)(opcode-0xF0); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fdivr(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* pop */ - softx86_popstack(ctx); -/* done */ - return 1; - } -/* FDIVP ST(i),ST(0) */ - else if (opcode >= 0xF8) { - int st0,i; - - i = (int)(opcode-0xF8); - i = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),i); - st0 = SX87_FPU_ST(SX87_FPUSTAT_TOP(ctx->state.status_word),0); -/* add */ - op_fdiv(ctx,&ctx->state.st[i],&ctx->state.st[st0]); -/* pop */ - softx86_popstack(ctx); -/* done */ - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 0) /* FIADD mem16 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,2,op_fiadd16); - else if (reg == 2) /* FICOM mem16 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,2,op_ficom16); - else if (reg == 3) /* FICOMP mem16 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,2,op_ficomp16); - else if (reg == 4) /* FISUB mem16 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,2,op_fisub16); - else if (reg == 6) /* FIDIV mem16 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,2,op_fidiv16); - else if (reg == 7) /* FIDIVR mem16 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,2,op_fidivr16); - else - return 0; - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_DE(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* FADDP ST(i),ST(0) */ - if (opcode >= 0xC0 && opcode < 0xC8) { - sprintf(buf,"FADDP ST(%d),ST(0)",opcode-0xC0); - return 1; - } -/* FCOMPP ST(0),ST(1) */ - else if (opcode == 0xD9) { - strcpy(buf,"FCOMPP"); - return 1; - } -/* FSUBP ST(i),ST(0) */ - else if (opcode >= 0xE8 && opcode < 0xEF) { - sprintf(buf,"FSUBP ST(%d),ST(0)",opcode-0xE8); - return 1; - } -/* FDIVP ST(i),ST(0) */ - else if (opcode >= 0xF8) { - sprintf(buf,"FDIVP ST(%d),ST(0)",opcode-0xF8); - return 1; - } -/* combo */ - else if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 0) - sprintf(buf,"FIADD %s (mem16)",s87op1_tmp); - else if (reg == 2) - sprintf(buf,"FICOM %s (mem16)",s87op1_tmp); - else if (reg == 3) - sprintf(buf,"FICOMP %s (mem16)",s87op1_tmp); - else if (reg == 4) - sprintf(buf,"FISUB %s (mem16)",s87op1_tmp); - else if (reg == 6) - sprintf(buf,"FIDIV %s (mem16)",s87op1_tmp); - else if (reg == 7) - sprintf(buf,"FIDIVR %s (mem16)",s87op1_tmp); - else - return 0; - - return 1; - } - - buf[0]=0; - return 0; -} - -static int Sfx87OpcodeExec_group_DF(sx87_ubyte opcode,softx87_ctx* ctx) -{ -/* combo */ - if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - - if (reg == 4) /* FBLD mem80 */ - ctx->callbacks.on_sx86_exec_full_modrmonly_memx(ctx->ref_softx86,mod,rm,10,op_fbld80); - else if (reg == 6) /* FBSTP mem80 */ - ctx->callbacks.on_sx86_exec_full_modrw_memx(ctx->ref_softx86,mod,rm,10,op_fbstp80); - else - return 0; - - return 1; - } - - return 0; -} - -static int Sfx87OpcodeDec_group_DF(sx87_ubyte opcode,softx87_ctx* ctx,char buf[128]) -{ -/* combo */ - if (opcode < 0xC0) { - sx86_ubyte mod,reg,rm; - - sx86_modregrm_unpack(opcode,mod,reg,rm); - ctx->callbacks.on_sx86_dec_full_modrmonly(ctx->ref_softx86,1,0,mod,rm,s87op1_tmp); - - if (reg == 4) - sprintf(buf,"FBLD %s (mem80)",s87op1_tmp); - else if (reg == 6) - sprintf(buf,"FBSTP %s (mem80)",s87op1_tmp); - else - return 0; - - return 1; - } - - buf[0]=0; - return 0; -} - -Sfx87OpcodeTable optab8087 = { -{ - {Sfx87OpcodeExec_group_D8, Sfx87OpcodeDec_group_D8}, /* 0xD8xx */ - {Sfx87OpcodeExec_group_D9, Sfx87OpcodeDec_group_D9}, /* 0xD9xx */ - {Sfx87OpcodeExec_group_DA, Sfx87OpcodeDec_group_DA}, /* 0xDAxx */ - {Sfx87OpcodeExec_group_DB, Sfx87OpcodeDec_group_DB}, /* 0xDBxx */ - {Sfx87OpcodeExec_group_DC, Sfx87OpcodeDec_group_DC}, /* 0xDCxx */ - {Sfx87OpcodeExec_group_DD, Sfx87OpcodeDec_group_DD}, /* 0xDDxx */ - {Sfx87OpcodeExec_group_DE, Sfx87OpcodeDec_group_DE}, /* 0xDExx */ - {Sfx87OpcodeExec_group_DF, Sfx87OpcodeDec_group_DF}, /* 0xDFxx */ -}, -}; diff --git a/lib/3rdparty/softx86/softx87/resource.h b/lib/3rdparty/softx86/softx87/resource.h deleted file mode 100644 index b416fe06a88..00000000000 --- a/lib/3rdparty/softx86/softx87/resource.h +++ /dev/null @@ -1,15 +0,0 @@ -//{{NO_DEPENDENCIES}} -// Microsoft Developer Studio generated include file. -// Used by softx87_dll.rc -// - -// Next default values for new objects -// -#ifdef APSTUDIO_INVOKED -#ifndef APSTUDIO_READONLY_SYMBOLS -#define _APS_NEXT_RESOURCE_VALUE 101 -#define _APS_NEXT_COMMAND_VALUE 40001 -#define _APS_NEXT_CONTROL_VALUE 1000 -#define _APS_NEXT_SYMED_VALUE 101 -#endif -#endif diff --git a/lib/3rdparty/softx86/softx87/softx87.c b/lib/3rdparty/softx86/softx87/softx87.c deleted file mode 100644 index 4184426782b..00000000000 --- a/lib/3rdparty/softx86/softx87/softx87.c +++ /dev/null @@ -1,446 +0,0 @@ -/* - * softx87.c - * - * Copyright (C) 2003, 2004 Jonathan Campbell - * - * Softx87 library API. - * - * Initialization, de-initialization, register modification, and default - * routines for callbacks (in case they weren't set by the host app). - * - * Internal to this library, there are also functions to take care of - * fetching the current opcode (as referred to by CS:IP), fetching - * the current opcode for the decompiler (as referred to by a separate - * pair CS:IP), and pushing/popping data to/from the stack (SS:SP). - * - *********************************************************************************** - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - ************************************************************************************/ - -#include -#include -#include -#include -#include -#include "optab87.h" - -/* utility function to normalize a floating point value */ -void softx87_normalize(softx87_ctx* ctx,softx87_reg80 *val) -{ - int lead0; - sx87_uldword sh; - - if (!val->mantissa) - return; - -/* how many leading 0 bits in the mantissa */ - lead0=0; - sh=0; - while (!((val->mantissa>>(63-sh))&1)) { - lead0++; - sh++; - } - -/* if none, don't do anything */ - if (!sh) - return; - -/* normalize */ - val->exponent -= sh; - val->mantissa <<= sh; -} - - -/* API for converting an FPU register to a type "double" value. - Yes, it is an approximation. Don't take it as the exact value. */ -double softx87_get_fpu_double(softx87_ctx* ctx,softx87_reg80 *reg,int *numtype) -{ - double val; - int exp; - -/* all special cases seem to revolve around exp == 0x7FFF */ - if (reg->exponent == 0x7FFF) { - if (reg->mantissa == 0) { - if (reg->sign_bit) { - if (numtype) - *numtype = SX87_FPU_NUMTYPE_NEGINF; - - return 0.00; - } - else { - if (numtype) - *numtype = SX87_FPU_NUMTYPE_POSINF; - - return 0.00; - } - } - else { - if (numtype) - *numtype = SX87_FPU_NUMTYPE_NAN; - - return 0.00; - } - } - -/* 16383 is the IEEE-754 bias for double extended precision numbers */ - exp = reg->exponent - (16383+63); -#ifdef MSVC_CANT_CONVERT_UI64_TO_DOUBLE - if ((reg->mantissa >> ((sx87_uldword)63))&1) - /* +2^64 to encourage positive value */ - val = ((double)((sx87_sldword)reg->mantissa)) + 18446744073709551616.00; - else - val = (double)((sx87_sldword)reg->mantissa); -#else - val = (double)(reg->mantissa); -#endif - val *= pow(2,(double)exp); - - if (numtype) - *numtype = SX87_FPU_NUMTYPE_NUMBER; - - if (reg->sign_bit) - val = -val; - - return val; -} - -double softx87_get_fpu_register_double(softx87_ctx* ctx,int i,int *numtype) -{ - if (i < 0 || i > 7) { - if (numtype) - *numtype = SX87_FPU_NUMTYPE_NAN; - - return 0.00; - } - - return softx87_get_fpu_double(ctx,&ctx->state.st[i],numtype); -} - -/* API for converting a type "double" value to an FPU register. - Yes, it is an approximation. Don't take it as the exact value. */ -void softx87_set_fpu_double(softx87_ctx* ctx,softx87_reg80 *reg,double val) -{ -/* log2 x = ln x / ln 2 */ - double sal; - int l2b; - int sgn; - - if (val < 0) { - sgn = 1; - val = -val; - } - else { - sgn = 0; - } - - if (val == 0) { - reg->sign_bit = sgn; - reg->exponent = 0; - reg->mantissa = 0; - return; - } - - l2b = (int)ceil(log(val)/log(2.0)); -/* calculate just so to produce a normalized value */ - sal = val * pow(2,(double)(63-l2b)); - l2b = 16383 + l2b; -/* store */ - reg->sign_bit = sgn; - reg->exponent = l2b; - reg->mantissa = (sx87_uldword)sal; -} - -void softx87_set_fpu_register_double(softx87_ctx* ctx,int i,double val) -{ - if (i < 0 || i > 7) - return; - - softx87_set_fpu_double(ctx,&ctx->state.st[i],val); -} - -/* callbacks intended to be called by softx86 */ -int softx87_on_fpu_opcode_exec(/* softx86_ctx */ void* _ctx86,/* softx87_ctx */ void* _ctx87,sx86_ubyte opcode) -{ - Sfx87OpcodeTable *sop; - softx86_ctx *ctx86; - softx87_ctx *ctx87; - sx87_ubyte op2; - -/* sanity check */ - ctx86 = (softx86_ctx*)_ctx86; - ctx87 = (softx87_ctx*)_ctx87; - if (!_ctx86 || !_ctx87) return 0; - if (opcode < 0xD8 || opcode > 0xDF) return 0; - sop = (Sfx87OpcodeTable*)ctx87->opcode_table; - - op2 = ctx87->callbacks.on_softx86_fetch_exec_byte(ctx86); - return sop->table[opcode-0xD8].exec(op2,ctx87); -} - -int softx87_on_fpu_opcode_dec(/* softx86_ctx */ void* _ctx86,/* softx87_ctx */ void* _ctx87,sx86_ubyte opcode,char buf[128]) -{ - Sfx87OpcodeTable *sop; - softx86_ctx *ctx86; - softx87_ctx *ctx87; - sx87_ubyte op2; - -/* sanity check */ - ctx86 = (softx86_ctx*)_ctx86; - ctx87 = (softx87_ctx*)_ctx87; - if (!_ctx86 || !_ctx87) return 0; - if (opcode < 0xD8 || opcode > 0xDF) return 0; - sop = (Sfx87OpcodeTable*)ctx87->opcode_table; - - op2 = ctx87->callbacks.on_softx86_fetch_dec_byte(ctx86); - return sop->table[opcode-0xD8].dec(op2,ctx87,buf); -} - -void softx87_finit_setup(softx87_ctx* ctx) -{ - softx87_set_fpu_register_double(ctx,0,0.00); - softx87_set_fpu_register_double(ctx,1,0.00); - softx87_set_fpu_register_double(ctx,2,0.00); - softx87_set_fpu_register_double(ctx,3,0.00); - softx87_set_fpu_register_double(ctx,4,0.00); - softx87_set_fpu_register_double(ctx,5,0.00); - softx87_set_fpu_register_double(ctx,6,0.00); - softx87_set_fpu_register_double(ctx,7,0.00); - ctx->state.control_word = 0x037F; - ctx->state.status_word = 0x0000; - ctx->state.tag_word = 0xFFFF; // all empty - ctx->state.last_instruction_memptr.offset = 0; - ctx->state.last_instruction_memptr.segment = 0; - ctx->state.data_pointer.offset = 0; - ctx->state.data_pointer.segment = 0; - ctx->state.last_opcode = 0; -} - -/* softx87_reset(context) - Resets a FPU - - return value: - 0 = failed - 1 = success */ -int softx87_reset(softx87_ctx* ctx) -{ - if (!ctx) return 0; - -/* switch on/off bugs */ - ctx->bugs.ip_ignores_prefix = - (ctx->level <= SX87_FPULEVEL_8087)?1:0; - -/* opcode table */ - ctx->opcode_table = (void*)(&optab8087); - -/* set up as if FINIT */ - softx87_finit_setup(ctx); - - return 1; /* success */ -} - -int softx87_getversion(int *major,int *minor,int *subminor) -{ - if (!minor || !major || !subminor) return 0; - - *major = SOFTX87_VERSION_HI; - *minor = SOFTX87_VERSION_LO; - *subminor = SOFTX87_VERSION_SUBLO; - return 1; -} - -/* softx87_init(context) - Initialize a FPU context structure. - - return value: - 0 = failed - 1 = success - 2 = beta development advisory (FPU level emulation not quite stable) */ -int softx87_init(softx87_ctx* ctx,int level) -{ - int ret; - - ret=1; - if (!ctx) return 0; - if (level > SX87_FPULEVEL_8087) return 0; /* we currently support up to the 8087 */ - if (level < 0) return 0; /* apparently the host wants an 80(-1)87? :) */ -// if (level > SX87_FPULEVEL_8087) ret=2; /* 80287 or higher emulation is not stable yet */ - ctx->level = level; - - if (!softx87_reset(ctx)) return 0; - -/* store version in the structure */ - ctx->version_hi = SOFTX87_VERSION_HI; - ctx->version_lo = SOFTX87_VERSION_LO; - ctx->version_sublo = SOFTX87_VERSION_SUBLO; - -/* default callbacks */ - ctx->callbacks.on_read_memory = softx87_step_def_on_read_memory; - ctx->callbacks.on_write_memory = softx87_step_def_on_write_memory; - ctx->callbacks.on_softx86_fetch_exec_byte = softx87_def_on_softx86_fetch_exec_byte; - ctx->callbacks.on_softx86_fetch_dec_byte = softx87_def_on_softx86_fetch_dec_byte; - ctx->callbacks.on_sx86_exec_full_modrmonly_memx = softx87_on_sx86_exec_full_modrmonly_memx; - ctx->callbacks.on_sx86_dec_full_modrmonly = softx87_on_sx86_dec_full_modrmonly; - - return ret; /* success */ -} - -/* softx86_free(context) - Free a FPU context structure */ -int softx87_free(softx87_ctx* ctx) -{ - if (!ctx) return 0; - - return 1; /* success */ -} - -/* enable/disable emulation of specific bugs. */ -int softx87_setbug(softx87_ctx* ctx,sx86_udword bug_id,sx86_ubyte on_off) -{ - if (bug_id == SX87_BUG_IP_IGNORES_PREFIX) { - ctx->bugs.ip_ignores_prefix = on_off; - return 1; - } - - return 0; -} - -/*-------------------------------------------------------------------------------- - default callbacks - --------------------------------------------------------------------------------*/ - -void softx87_on_sx86_exec_full_modrmonly_memx(softx86_ctx *ctx,sx86_ubyte mod,sx86_ubyte rm,int sz,void (*op64)(softx86_ctx* ctx,char *datz,int sz)) -{ -} - -void softx87_on_sx86_dec_full_modrmonly(softx86_ctx* ctx,sx86_ubyte is_word,sx86_ubyte dat32,sx86_ubyte mod,sx86_ubyte rm,char* op1) -{ -} - -sx86_ubyte softx87_def_on_softx86_fetch_exec_byte(softx86_ctx* ctx) -{ - return 0xFF; -} - -sx86_ubyte softx87_def_on_softx86_fetch_dec_byte(softx86_ctx* ctx) -{ - return 0xFF; -} - -void softx87_step_def_on_read_memory(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - softx87_ctx *ctx = ((softx87_ctx*)_ctx); - if (!ctx || !buf || size < 1) return; - memset(buf,0xFF,size); -} - -void softx87_step_def_on_write_memory(void* _ctx,sx86_udword address,sx86_ubyte *buf,int size) -{ - softx87_ctx *ctx = ((softx87_ctx*)_ctx); - if (!ctx || !buf || size < 1) return; -} - -/* loading/storing and conversion code */ - -/* loads 16-bit integer from data[] */ -void softx87_unpack_raw_int16(softx87_ctx* ctx,char *data,softx87_reg80 *v) -{ -#if SX86_BYTE_ORDER == LE - v->mantissa = (sx87_uldword)(*((sx87_uword*)data)); -#else - v->mantissa = (sx87_uldword)data[0]; - v->mantissa |= ((sx87_uldword)data[1])<<((sx87_uldword)8); -#endif - -/* there. we have all 16 bits. spread them around. */ - v->sign_bit = (v->mantissa >> ((sx87_uldword)15)); - v->exponent = 14; - if (v->sign_bit) v->mantissa = ((v->mantissa ^ 0xFFFF)+1); - v->mantissa <<= (sx87_uldword)49; - -/* convert the exponent */ - v->exponent = v->exponent + 16383; -} - -/* loads 32-bit integer from data[] */ -void softx87_unpack_raw_int32(softx87_ctx* ctx,char *data,softx87_reg80 *v) -{ -#if SX86_BYTE_ORDER == LE - v->mantissa = (sx87_uldword)(*((sx87_udword*)data)); -#else - v->mantissa = (sx87_uldword)data[3]; - v->mantissa |= ((sx87_uldword)data[2])<<((sx87_uldword)8); - v->mantissa |= ((sx87_uldword)data[1])<<((sx87_uldword)16); - v->mantissa |= ((sx87_uldword)data[0])<<((sx87_uldword)24); -#endif - -/* there. we have all 32 bits. spread them around. */ - v->sign_bit = (v->mantissa >> ((sx87_uldword)31)); - v->exponent = 30; - if (v->sign_bit) v->mantissa = ((v->mantissa ^ 0xFFFFFFFF)+1); - v->mantissa <<= (sx87_uldword)33; - -/* convert the exponent */ - v->exponent = v->exponent + 16383; -} - -/* loads 32-bit double precision floating point from data[] */ -void softx87_unpack_raw_fp32(softx87_ctx* ctx,char *data,softx87_reg80 *v) -{ -#if SX86_BYTE_ORDER == LE - v->mantissa = (sx87_uldword)(*((sx87_udword*)data)); -#else - v->mantissa = (sx87_uldword)data[3]; - v->mantissa |= ((sx87_uldword)data[2])<<((sx87_uldword)8); - v->mantissa |= ((sx87_uldword)data[1])<<((sx87_uldword)16); - v->mantissa |= ((sx87_uldword)data[0])<<((sx87_uldword)24); -#endif - -/* there. we have all 32 bits. spread them around. */ - v->sign_bit = (v->mantissa >> ((sx87_uldword)31)); - v->exponent = (v->mantissa >> ((sx87_uldword)23))&0xFF; - v->mantissa &= (sx87_uldword)(0x7FFFFF); - v->mantissa |= (sx87_uldword)(0x800000); /* implied "1"? */ - v->mantissa <<= (sx87_uldword)40; - -/* convert the exponent */ - v->exponent = (v->exponent - 127) + 16383; -} - -/* loads 64-bit double precision floating point from data[] */ -void softx87_unpack_raw_fp64(softx87_ctx* ctx,char *data,softx87_reg80 *v) -{ -#if SX86_BYTE_ORDER == LE - v->mantissa = *((sx87_uldword*)data); -#else - v->mantissa = (sx87_uldword)data[7]; - v->mantissa |= ((sx87_uldword)data[6])<<((sx87_uldword)8); - v->mantissa |= ((sx87_uldword)data[5])<<((sx87_uldword)16); - v->mantissa |= ((sx87_uldword)data[4])<<((sx87_uldword)24); - v->mantissa |= ((sx87_uldword)data[3])<<((sx87_uldword)32); - v->mantissa |= ((sx87_uldword)data[2])<<((sx87_uldword)40); - v->mantissa |= ((sx87_uldword)data[1])<<((sx87_uldword)48); - v->mantissa |= ((sx87_uldword)data[0])<<((sx87_uldword)56); -#endif - -/* there. we have all 64 bits. spread them around. */ - v->sign_bit = (v->mantissa >> ((sx87_uldword)63)); - v->exponent = (v->mantissa >> ((sx87_uldword)52))&0x7FF; - v->mantissa &= (sx87_uldword)(0x0FFFFFFFFFFFFF); - v->mantissa |= (sx87_uldword)(0x10000000000000); /* implied "1"? */ - v->mantissa <<= (sx87_uldword)11; - -/* convert the exponent */ - v->exponent = (v->exponent - 1023) + 16383; -} diff --git a/lib/3rdparty/softx86/softx87/softx87_dll.def b/lib/3rdparty/softx86/softx87/softx87_dll.def deleted file mode 100644 index 49982c718da..00000000000 --- a/lib/3rdparty/softx86/softx87/softx87_dll.def +++ /dev/null @@ -1,14 +0,0 @@ - -LIBRARY SOFTX87 -EXPORTS softx87_getversion - softx87_init - softx87_reset - softx87_free - softx87_get_fpu_register_double - softx87_set_fpu_register_double - softx87_finit_setup - softx87_on_fpu_opcode_exec - softx87_on_fpu_opcode_dec - softx87_setbug - softx87_unpack_raw_fp32 - softx87_unpack_raw_fp64 diff --git a/lib/3rdparty/softx86/softx87/softx87_dll.dsp b/lib/3rdparty/softx86/softx87/softx87_dll.dsp deleted file mode 100644 index 096086e9dea..00000000000 --- a/lib/3rdparty/softx86/softx87/softx87_dll.dsp +++ /dev/null @@ -1,117 +0,0 @@ -# Microsoft Developer Studio Project File - Name="softx87_dll" - Package Owner=<4> -# Microsoft Developer Studio Generated Build File, Format Version 6.00 -# ** DO NOT EDIT ** - -# TARGTYPE "Win32 (x86) Dynamic-Link Library" 0x0102 - -CFG=softx87_dll - Win32 Debug -!MESSAGE This is not a valid makefile. To build this project using NMAKE, -!MESSAGE use the Export Makefile command and run -!MESSAGE -!MESSAGE NMAKE /f "softx87_dll.mak". -!MESSAGE -!MESSAGE You can specify a configuration when running NMAKE -!MESSAGE by defining the macro CFG on the command line. For example: -!MESSAGE -!MESSAGE NMAKE /f "softx87_dll.mak" CFG="softx87_dll - Win32 Debug" -!MESSAGE -!MESSAGE Possible choices for configuration are: -!MESSAGE -!MESSAGE "softx87_dll - Win32 Release" (based on "Win32 (x86) Dynamic-Link Library") -!MESSAGE "softx87_dll - Win32 Debug" (based on "Win32 (x86) Dynamic-Link Library") -!MESSAGE - -# Begin Project -# PROP AllowPerConfigDependencies 0 -# PROP Scc_ProjName "" -# PROP Scc_LocalPath "" -CPP=cl.exe -MTL=midl.exe -RSC=rc.exe - -!IF "$(CFG)" == "softx87_dll - Win32 Release" - -# PROP BASE Use_MFC 0 -# PROP BASE Use_Debug_Libraries 0 -# PROP BASE Output_Dir "Release" -# PROP BASE Intermediate_Dir "Release" -# PROP BASE Target_Dir "" -# PROP Use_MFC 0 -# PROP Use_Debug_Libraries 0 -# PROP Output_Dir "Release" -# PROP Intermediate_Dir "Release" -# PROP Ignore_Export_Lib 0 -# PROP Target_Dir "" -# ADD BASE CPP /nologo /MT /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_WINDOWS" /D "_MBCS" /D "_USRDLL" /D "SOFTX87_DLL_EXPORTS" /YX /FD /c -# ADD CPP /nologo /MT /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_WINDOWS" /D "_MBCS" /D "_USRDLL" /D "SOFTX87_DLL_EXPORTS" /YX /FD /c -# ADD BASE MTL /nologo /D "NDEBUG" /mktyplib203 /win32 -# ADD MTL /nologo /D "NDEBUG" /mktyplib203 /win32 -# ADD BASE RSC /l 0x409 /d "NDEBUG" -# ADD RSC /l 0x409 /d "NDEBUG" -BSC32=bscmake.exe -# ADD BASE BSC32 /nologo -# ADD BSC32 /nologo -LINK32=link.exe -# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /dll /machine:I386 -# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /dll /machine:I386 /out:"../bin/softx87.dll" /implib:"../lib/softx87_dll.lib" -# SUBTRACT LINK32 /pdb:none - -!ELSEIF "$(CFG)" == "softx87_dll - Win32 Debug" - -# PROP BASE Use_MFC 0 -# PROP BASE Use_Debug_Libraries 1 -# PROP BASE Output_Dir "Debug" -# PROP BASE Intermediate_Dir "Debug" -# PROP BASE Target_Dir "" -# PROP Use_MFC 0 -# PROP Use_Debug_Libraries 1 -# PROP Output_Dir "Debug" -# PROP Intermediate_Dir "Debug" -# PROP Ignore_Export_Lib 0 -# PROP Target_Dir "" -# ADD BASE CPP /nologo /MTd /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_WINDOWS" /D "_MBCS" /D "_USRDLL" /D "SOFTX87_DLL_EXPORTS" /YX /FD /GZ /c -# ADD CPP /nologo /MTd /W3 /Gm /GX /ZI /Od /I "./" /I "../include" /D "WIN32" /D "_DEBUG" /D "_WINDOWS" /D "_MBCS" /D "_USRDLL" /D "SOFTX87_DLL_EXPORTS" /YX /FD /GZ /c -# ADD BASE MTL /nologo /D "_DEBUG" /mktyplib203 /win32 -# ADD MTL /nologo /D "_DEBUG" /mktyplib203 /win32 -# ADD BASE RSC /l 0x409 /d "_DEBUG" -# ADD RSC /l 0x409 /d "_DEBUG" -BSC32=bscmake.exe -# ADD BASE BSC32 /nologo -# ADD BSC32 /nologo -LINK32=link.exe -# ADD BASE LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib /nologo /dll /debug /machine:I386 /pdbtype:sept -# ADD LINK32 kernel32.lib user32.lib gdi32.lib winspool.lib comdlg32.lib advapi32.lib shell32.lib ole32.lib oleaut32.lib uuid.lib odbc32.lib odbccp32.lib ..\lib\softx87_static.lib /nologo /dll /debug /machine:I386 /out:"../bin/softx87.dll" /implib:"../lib/softx87_dll.lib" /pdbtype:sept -# SUBTRACT LINK32 /pdb:none - -!ENDIF - -# Begin Target - -# Name "softx87_dll - Win32 Release" -# Name "softx87_dll - Win32 Debug" -# Begin Group "Resource Files" - -# PROP Default_Filter "ico;cur;bmp;dlg;rc2;rct;bin;rgs;gif;jpg;jpeg;jpe" -# Begin Source File - -SOURCE=.\softx87_dll.rc -# End Source File -# End Group -# Begin Group "DLL export definitions" - -# PROP Default_Filter "*.def" -# Begin Source File - -SOURCE=.\softx87_dll.def -# End Source File -# End Group -# Begin Group "Win32 DLL shell" - -# PROP Default_Filter "" -# Begin Source File - -SOURCE=.\windll.c -# End Source File -# End Group -# End Target -# End Project diff --git a/lib/3rdparty/softx86/softx87/softx87_dll.rc b/lib/3rdparty/softx86/softx87/softx87_dll.rc deleted file mode 100644 index 5ac9252bd46..00000000000 --- a/lib/3rdparty/softx86/softx87/softx87_dll.rc +++ /dev/null @@ -1,109 +0,0 @@ -//Microsoft Developer Studio generated resource script. -// -#include "resource.h" - -#define APSTUDIO_READONLY_SYMBOLS -///////////////////////////////////////////////////////////////////////////// -// -// Generated from the TEXTINCLUDE 2 resource. -// -#include "afxres.h" - -///////////////////////////////////////////////////////////////////////////// -#undef APSTUDIO_READONLY_SYMBOLS - -///////////////////////////////////////////////////////////////////////////// -// English (U.S.) resources - -#if !defined(AFX_RESOURCE_DLL) || defined(AFX_TARG_ENU) -#ifdef _WIN32 -LANGUAGE LANG_ENGLISH, SUBLANG_ENGLISH_US -#pragma code_page(1252) -#endif //_WIN32 - -#ifndef _MAC -///////////////////////////////////////////////////////////////////////////// -// -// Version -// - -VS_VERSION_INFO VERSIONINFO - FILEVERSION 0,0,0,33 - PRODUCTVERSION 0,0,0,33 - FILEFLAGSMASK 0x3fL -#ifdef _DEBUG - FILEFLAGS 0x1L -#else - FILEFLAGS 0x0L -#endif - FILEOS 0x4L - FILETYPE 0x2L - FILESUBTYPE 0x0L -BEGIN - BLOCK "StringFileInfo" - BEGIN - BLOCK "040904b0" - BEGIN - VALUE "Comments", "\0" - VALUE "CompanyName", "\0" - VALUE "FileDescription", "Softx87 FPU library v0.00.0033\0" - VALUE "FileVersion", "0, 0, 0, 33\0" - VALUE "InternalName", "softx87.dll\0" - VALUE "LegalCopyright", "Copyright © 2003, 2004 Jonathan Campbell\0" - VALUE "LegalTrademarks", "\0" - VALUE "OriginalFilename", "softx87.dll\0" - VALUE "PrivateBuild", "\0" - VALUE "ProductName", "Softx87\0" - VALUE "ProductVersion", "0, 0, 0, 33\0" - VALUE "SpecialBuild", "\0" - END - END - BLOCK "VarFileInfo" - BEGIN - VALUE "Translation", 0x409, 1200 - END -END - -#endif // !_MAC - - -#ifdef APSTUDIO_INVOKED -///////////////////////////////////////////////////////////////////////////// -// -// TEXTINCLUDE -// - -1 TEXTINCLUDE DISCARDABLE -BEGIN - "resource.h\0" -END - -2 TEXTINCLUDE DISCARDABLE -BEGIN - "#include ""afxres.h""\r\n" - "\0" -END - -3 TEXTINCLUDE DISCARDABLE -BEGIN - "\r\n" - "\0" -END - -#endif // APSTUDIO_INVOKED - -#endif // English (U.S.) resources -///////////////////////////////////////////////////////////////////////////// - - - -#ifndef APSTUDIO_INVOKED -///////////////////////////////////////////////////////////////////////////// -// -// Generated from the TEXTINCLUDE 3 resource. -// - - -///////////////////////////////////////////////////////////////////////////// -#endif // not APSTUDIO_INVOKED - diff --git a/lib/3rdparty/softx86/softx87/softx87_static.dsp b/lib/3rdparty/softx86/softx87/softx87_static.dsp deleted file mode 100644 index 5141e9acfc3..00000000000 --- a/lib/3rdparty/softx86/softx87/softx87_static.dsp +++ /dev/null @@ -1,108 +0,0 @@ -# Microsoft Developer Studio Project File - Name="softx87_static" - Package Owner=<4> -# Microsoft Developer Studio Generated Build File, Format Version 6.00 -# ** DO NOT EDIT ** - -# TARGTYPE "Win32 (x86) Static Library" 0x0104 - -CFG=softx87_static - Win32 Debug -!MESSAGE This is not a valid makefile. To build this project using NMAKE, -!MESSAGE use the Export Makefile command and run -!MESSAGE -!MESSAGE NMAKE /f "softx87_static.mak". -!MESSAGE -!MESSAGE You can specify a configuration when running NMAKE -!MESSAGE by defining the macro CFG on the command line. For example: -!MESSAGE -!MESSAGE NMAKE /f "softx87_static.mak" CFG="softx87_static - Win32 Debug" -!MESSAGE -!MESSAGE Possible choices for configuration are: -!MESSAGE -!MESSAGE "softx87_static - Win32 Release" (based on "Win32 (x86) Static Library") -!MESSAGE "softx87_static - Win32 Debug" (based on "Win32 (x86) Static Library") -!MESSAGE - -# Begin Project -# PROP AllowPerConfigDependencies 0 -# PROP Scc_ProjName "" -# PROP Scc_LocalPath "" -CPP=cl.exe -RSC=rc.exe - -!IF "$(CFG)" == "softx87_static - Win32 Release" - -# PROP BASE Use_MFC 0 -# PROP BASE Use_Debug_Libraries 0 -# PROP BASE Output_Dir "Release" -# PROP BASE Intermediate_Dir "Release" -# PROP BASE Target_Dir "" -# PROP Use_MFC 0 -# PROP Use_Debug_Libraries 0 -# PROP Output_Dir "Release" -# PROP Intermediate_Dir "Release" -# PROP Target_Dir "" -# ADD BASE CPP /nologo /W3 /GX /O2 /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /YX /FD /c -# ADD CPP /nologo /W3 /GX /O2 /I "./" /I "../include" /D "WIN32" /D "NDEBUG" /D "_MBCS" /D "_LIB" /YX /FD /c -# ADD BASE RSC /l 0x409 /d "NDEBUG" -# ADD RSC /l 0x409 /d "NDEBUG" -BSC32=bscmake.exe -# ADD BASE BSC32 /nologo -# ADD BSC32 /nologo -LIB32=link.exe -lib -# ADD BASE LIB32 /nologo -# ADD LIB32 /nologo /out:"..\lib\softx87_static.lib" - -!ELSEIF "$(CFG)" == "softx87_static - Win32 Debug" - -# PROP BASE Use_MFC 0 -# PROP BASE Use_Debug_Libraries 1 -# PROP BASE Output_Dir "Debug" -# PROP BASE Intermediate_Dir "Debug" -# PROP BASE Target_Dir "" -# PROP Use_MFC 0 -# PROP Use_Debug_Libraries 1 -# PROP Output_Dir "Debug" -# PROP Intermediate_Dir "Debug" -# PROP Target_Dir "" -# ADD BASE CPP /nologo /W3 /Gm /GX /ZI /Od /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /YX /FD /GZ /c -# ADD CPP /nologo /W3 /Gm /GX /ZI /Od /I "./" /I "../include" /D "WIN32" /D "_DEBUG" /D "_MBCS" /D "_LIB" /YX /FD /GZ /c -# ADD BASE RSC /l 0x409 /d "_DEBUG" -# ADD RSC /l 0x409 /d "_DEBUG" -BSC32=bscmake.exe -# ADD BASE BSC32 /nologo -# ADD BSC32 /nologo -LIB32=link.exe -lib -# ADD BASE LIB32 /nologo -# ADD LIB32 /nologo /out:"..\lib\softx87_static.lib" - -!ENDIF - -# Begin Target - -# Name "softx87_static - Win32 Release" -# Name "softx87_static - Win32 Debug" -# Begin Group "Source Files" - -# PROP Default_Filter "cpp;c;cxx;rc;def;r;odl;idl;hpj;bat" -# Begin Source File - -SOURCE=.\optable.c -# End Source File -# Begin Source File - -SOURCE=.\softx87.c -# End Source File -# End Group -# Begin Group "Header Files" - -# PROP Default_Filter "h;hpp;hxx;hm;inl" -# Begin Source File - -SOURCE=.\optab87.h -# End Source File -# Begin Source File - -SOURCE=..\include\softx87.h -# End Source File -# End Group -# End Target -# End Project diff --git a/lib/3rdparty/softx86/softx87/windll.c b/lib/3rdparty/softx86/softx87/windll.c deleted file mode 100644 index 54227b860fc..00000000000 --- a/lib/3rdparty/softx86/softx87/windll.c +++ /dev/null @@ -1,7 +0,0 @@ - -#include - -BOOL WINAPI DllMain(HINSTANCE hInstance,DWORD dwReason,LPVOID lpWhatever) -{ - return TRUE; -} \ No newline at end of file diff --git a/lib/3rdparty/softx86/todo.txt b/lib/3rdparty/softx86/todo.txt deleted file mode 100644 index aa36ac2ce99..00000000000 --- a/lib/3rdparty/softx86/todo.txt +++ /dev/null @@ -1,11 +0,0 @@ - - - Most (if not the entire) x86 instruction set :) - - - Correct me if I'm wrong about when certain instructions - (like BOUND) appeared in the 8086 instruction set. Nobody - seems to have clear-cut documentation on precisely what - revision added what instructions. - - - Find everything wrong with 8086/8088 emulation NOW - so that in the future, development of 286/386/486 - emulation goes a lot smoother. \ No newline at end of file diff --git a/subsystems/ntvdm/CMakeLists.txt b/subsystems/ntvdm/CMakeLists.txt index 0b0113f8864..cab497c38e5 100644 --- a/subsystems/ntvdm/CMakeLists.txt +++ b/subsystems/ntvdm/CMakeLists.txt @@ -1,5 +1,4 @@ -include_directories(${REACTOS_SOURCE_DIR}/include/reactos/libs/softx86) include_directories(${REACTOS_SOURCE_DIR}/include/reactos/libs/fast486) spec2def(ntvdm.exe ntvdm.spec) @@ -19,7 +18,7 @@ list(APPEND SOURCE add_executable(ntvdm ${SOURCE}) set_module_type(ntvdm win32cui UNICODE) -target_link_libraries(ntvdm softx86 softx87 fast486) +target_link_libraries(ntvdm fast486) add_importlibs(ntvdm msvcrt user32 gdi32 kernel32 ntdll) -add_dependencies(ntvdm softx86 softx87) +add_dependencies(ntvdm fast486) add_cd_file(TARGET ntvdm DESTINATION reactos/system32 FOR all)