From e2c2d3379bc22eade0b42ea9df4c3a748f3d424f Mon Sep 17 00:00:00 2001 From: Aleksandar Andrejevic Date: Sun, 21 Jun 2015 02:36:20 +0000 Subject: [PATCH] [NTVDM] Begin upgrading the VGA emulation to SuperVGA emulation (Cirrus Logic CL-GD5343 compatible). This is still a WIP. So far only the VCLK and MCLK have been implemented. svn path=/trunk/; revision=68216 --- reactos/subsystems/mvdm/ntvdm/CMakeLists.txt | 2 +- reactos/subsystems/mvdm/ntvdm/bios/vidbios.c | 2 +- reactos/subsystems/mvdm/ntvdm/clock.c | 2 +- reactos/subsystems/mvdm/ntvdm/cpu/cpu.c | 2 +- reactos/subsystems/mvdm/ntvdm/dos/mouse32.c | 2 +- reactos/subsystems/mvdm/ntvdm/emulator.c | 2 +- .../subsystems/mvdm/ntvdm/hardware/mouse.c | 2 +- .../ntvdm/hardware/video/{vga.c => svga.c} | 192 +++++++++++++++--- .../ntvdm/hardware/video/{vga.h => svga.h} | 129 +++++++++++- 9 files changed, 295 insertions(+), 40 deletions(-) rename reactos/subsystems/mvdm/ntvdm/hardware/video/{vga.c => svga.c} (93%) rename reactos/subsystems/mvdm/ntvdm/hardware/video/{vga.h => svga.h} (64%) diff --git a/reactos/subsystems/mvdm/ntvdm/CMakeLists.txt b/reactos/subsystems/mvdm/ntvdm/CMakeLists.txt index 57d9b43ce26..fd9195535b0 100644 --- a/reactos/subsystems/mvdm/ntvdm/CMakeLists.txt +++ b/reactos/subsystems/mvdm/ntvdm/CMakeLists.txt @@ -27,7 +27,7 @@ list(APPEND SOURCE hardware/ppi.c hardware/ps2.c hardware/sound/speaker.c - hardware/video/vga.c + hardware/video/svga.c dos/dos32krnl/bios.c dos/dos32krnl/condrv.c dos/dos32krnl/device.c diff --git a/reactos/subsystems/mvdm/ntvdm/bios/vidbios.c b/reactos/subsystems/mvdm/ntvdm/bios/vidbios.c index 2f8a2b2e4d7..7646870bcd0 100644 --- a/reactos/subsystems/mvdm/ntvdm/bios/vidbios.c +++ b/reactos/subsystems/mvdm/ntvdm/bios/vidbios.c @@ -21,7 +21,7 @@ // #include "vidbios.h" #include "io.h" -#include "hardware/video/vga.h" +#include "hardware/video/svga.h" /* DEFINES ********************************************************************/ diff --git a/reactos/subsystems/mvdm/ntvdm/clock.c b/reactos/subsystems/mvdm/ntvdm/clock.c index bcb0148e259..0250ea8bac8 100644 --- a/reactos/subsystems/mvdm/ntvdm/clock.c +++ b/reactos/subsystems/mvdm/ntvdm/clock.c @@ -19,7 +19,7 @@ #include "hardware/cmos.h" #include "hardware/ps2.h" #include "hardware/pit.h" -#include "hardware/video/vga.h" +#include "hardware/video/svga.h" #include "hardware/mouse.h" /* DEFINES ********************************************************************/ diff --git a/reactos/subsystems/mvdm/ntvdm/cpu/cpu.c b/reactos/subsystems/mvdm/ntvdm/cpu/cpu.c index b2074ddbb94..5957875c182 100644 --- a/reactos/subsystems/mvdm/ntvdm/cpu/cpu.c +++ b/reactos/subsystems/mvdm/ntvdm/cpu/cpu.c @@ -28,7 +28,7 @@ #include "hardware/ps2.h" #include "hardware/sound/speaker.h" #include "hardware/pit.h" -#include "hardware/video/vga.h" +#include "hardware/video/svga.h" #include "io.h" diff --git a/reactos/subsystems/mvdm/ntvdm/dos/mouse32.c b/reactos/subsystems/mvdm/ntvdm/dos/mouse32.c index 99a63fb8ef1..c11fe90337f 100644 --- a/reactos/subsystems/mvdm/ntvdm/dos/mouse32.c +++ b/reactos/subsystems/mvdm/ntvdm/dos/mouse32.c @@ -18,7 +18,7 @@ #include "hardware/mouse.h" #include "hardware/ps2.h" #include "hardware/pic.h" -#include "hardware/video/vga.h" +#include "hardware/video/svga.h" #include "mouse32.h" #include "bios/bios.h" diff --git a/reactos/subsystems/mvdm/ntvdm/emulator.c b/reactos/subsystems/mvdm/ntvdm/emulator.c index 933162c2949..481afe1271f 100644 --- a/reactos/subsystems/mvdm/ntvdm/emulator.c +++ b/reactos/subsystems/mvdm/ntvdm/emulator.c @@ -32,7 +32,7 @@ #include "hardware/ppi.h" #include "hardware/ps2.h" #include "hardware/sound/speaker.h" -#include "hardware/video/vga.h" +#include "hardware/video/svga.h" #include "vddsup.h" #include "io.h" diff --git a/reactos/subsystems/mvdm/ntvdm/hardware/mouse.c b/reactos/subsystems/mvdm/ntvdm/hardware/mouse.c index 1d138a52497..3936c7bf1cb 100644 --- a/reactos/subsystems/mvdm/ntvdm/hardware/mouse.c +++ b/reactos/subsystems/mvdm/ntvdm/hardware/mouse.c @@ -15,7 +15,7 @@ #include "ps2.h" #include "clock.h" -#include "video/vga.h" +#include "video/svga.h" /* PRIVATE VARIABLES **********************************************************/ diff --git a/reactos/subsystems/mvdm/ntvdm/hardware/video/vga.c b/reactos/subsystems/mvdm/ntvdm/hardware/video/svga.c similarity index 93% rename from reactos/subsystems/mvdm/ntvdm/hardware/video/vga.c rename to reactos/subsystems/mvdm/ntvdm/hardware/video/svga.c index 2aa0c4aa757..e74b1f5c7ab 100644 --- a/reactos/subsystems/mvdm/ntvdm/hardware/video/vga.c +++ b/reactos/subsystems/mvdm/ntvdm/hardware/video/svga.c @@ -1,8 +1,8 @@ /* * COPYRIGHT: GPL - See COPYING in the top level directory * PROJECT: ReactOS Virtual DOS Machine - * FILE: vga.c - * PURPOSE: VGA hardware emulation + * FILE: svga.c + * PURPOSE: SuperVGA hardware emulation (Cirrus Logic CL-GD5434 compatible) * PROGRAMMERS: Aleksandar Andrejevic */ @@ -12,7 +12,7 @@ #include "ntvdm.h" #include "emulator.h" -#include "vga.h" +#include "svga.h" #include #include "memory.h" @@ -253,7 +253,7 @@ static PHARDWARE_TIMER HSyncTimer; /* * VGA Hardware */ -static BYTE VgaMemory[VGA_NUM_BANKS * VGA_BANK_SIZE]; +static BYTE VgaMemory[VGA_NUM_BANKS * SVGA_BANK_SIZE]; static BYTE VgaLatchRegisters[VGA_NUM_BANKS] = {0, 0, 0, 0}; @@ -261,13 +261,13 @@ static BYTE VgaMiscRegister; static BYTE VgaFeatureRegister; static BYTE VgaSeqIndex = VGA_SEQ_RESET_REG; -static BYTE VgaSeqRegisters[VGA_SEQ_MAX_REG]; +static BYTE VgaSeqRegisters[SVGA_SEQ_MAX_REG]; static BYTE VgaCrtcIndex = VGA_CRTC_HORZ_TOTAL_REG; -static BYTE VgaCrtcRegisters[VGA_CRTC_MAX_REG]; +static BYTE VgaCrtcRegisters[SVGA_CRTC_MAX_REG]; static BYTE VgaGcIndex = VGA_GC_RESET_REG; -static BYTE VgaGcRegisters[VGA_GC_MAX_REG]; +static BYTE VgaGcRegisters[SVGA_GC_MAX_REG]; static BOOLEAN VgaAcLatch = FALSE; static BOOLEAN VgaAcPalDisable = TRUE; @@ -290,6 +290,9 @@ static BOOLEAN ModeChanged = FALSE; static BOOLEAN CursorChanged = FALSE; static BOOLEAN PaletteChanged = FALSE; +static UINT SvgaHdrCounter = 0; +static BYTE SvgaHiddenRegister = 0; + typedef enum _SCREEN_MODE { TEXT_MODE, @@ -744,6 +747,88 @@ static inline VOID VgaMarkForUpdate(SHORT Row, SHORT Column) NeedsUpdate = TRUE; } +static inline ULONG VgaGetClockFrequency(VOID) +{ + BYTE Numerator, Denominator; + + if (VgaSeqRegisters[SVGA_SEQ_MCLK_REG] & SVGA_SEQ_MCLK_VCLK) + { + /* The VCLK is being generated using the MCLK */ + ULONG Clock = (VGA_CLOCK_BASE * (VgaSeqRegisters[SVGA_SEQ_MCLK_REG] & 0x3F)) >> 3; + + if (VgaSeqRegisters[SVGA_SEQ_VCLK3_DENOMINATOR_REG] & 1) + { + /* Use only half of the MCLK as the VCLK */ + Clock >>= 1; + } + + return Clock; + } + + switch ((VgaMiscRegister >> 2) & 3) + { + case 0: + { + Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK0_NUMERATOR_REG]; + Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK0_DENOMINATOR_REG]; + break; + } + + case 1: + { + Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK1_NUMERATOR_REG]; + Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK1_DENOMINATOR_REG]; + break; + } + + case 2: + { + Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK2_NUMERATOR_REG]; + Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK2_DENOMINATOR_REG]; + break; + } + + case 3: + { + Numerator = VgaSeqRegisters[SVGA_SEQ_VCLK3_NUMERATOR_REG]; + Denominator = VgaSeqRegisters[SVGA_SEQ_VCLK3_DENOMINATOR_REG]; + break; + } + } + + /* The numerator is 7-bit */ + Numerator &= ~(1 << 7); + + /* If bit 7 is clear, the denominator is 5-bit */ + if (!(Denominator & (1 << 7))) Denominator &= ~(1 << 6); + + /* Bit 0 of the denominator is the post-scalar bit */ + if (Denominator & 1) Denominator &= ~1; + else Denominator >>= 1; + + /* Return the clock frequency in Hz */ + return (VGA_CLOCK_BASE * Numerator) / Denominator; +} + +static VOID VgaResetSequencer(VOID) +{ + /* Lock extended SVGA registers */ + VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] = SVGA_SEQ_LOCKED; + + /* Initialize the VCLKs */ + VgaSeqRegisters[SVGA_SEQ_VCLK0_NUMERATOR_REG] = 0x66; + VgaSeqRegisters[SVGA_SEQ_VCLK0_DENOMINATOR_REG] = 0x3B; + VgaSeqRegisters[SVGA_SEQ_VCLK1_NUMERATOR_REG] = 0x5B; + VgaSeqRegisters[SVGA_SEQ_VCLK1_DENOMINATOR_REG] = 0x2F; + VgaSeqRegisters[SVGA_SEQ_VCLK2_NUMERATOR_REG] = 0x45; + VgaSeqRegisters[SVGA_SEQ_VCLK2_DENOMINATOR_REG] = 0x30; + VgaSeqRegisters[SVGA_SEQ_VCLK3_NUMERATOR_REG] = 0x7E; + VgaSeqRegisters[SVGA_SEQ_VCLK3_DENOMINATOR_REG] = 0x33; + + /* 50 MHz MCLK, not being used as the VCLK */ + VgaSeqRegisters[SVGA_SEQ_MCLK_REG] = 0x1C; +} + static VOID VgaRestoreDefaultPalette(PPALETTEENTRY Entries, USHORT NumOfEntries) { USHORT i; @@ -1395,6 +1480,8 @@ static VOID VgaUpdateTextCursor(VOID) static BYTE WINAPI VgaReadPort(USHORT Port) { DPRINT("VgaReadPort: Port 0x%X\n", Port); + + if (Port != VGA_DAC_MASK) SvgaHdrCounter = 0; switch (Port) { @@ -1412,7 +1499,7 @@ static BYTE WINAPI VgaReadPort(USHORT Port) ULONGLONG Cycles = GetCycleCount(); ULONG CyclesPerMicrosecond = (ULONG)((GetCycleSpeed() + 500000ULL) / 1000000ULL); ULONG Dots = (VgaSeqRegisters[VGA_SEQ_CLOCK_REG] & 1) ? 9 : 8; - ULONG Clock = ((VgaMiscRegister >> 2) & 1) ? 28 : 25; + ULONG Clock = VgaGetClockFrequency() / 1000000; ULONG HorizTotalDots = ((ULONG)VgaCrtcRegisters[VGA_CRTC_HORZ_TOTAL_REG] + 5) * Dots; ULONG VblankStart, VblankEnd, HblankStart, HblankEnd; ULONG HblankDuration, VblankDuration; @@ -1466,7 +1553,18 @@ static BYTE WINAPI VgaReadPort(USHORT Port) return VgaSeqRegisters[VgaSeqIndex]; case VGA_DAC_MASK: - return VgaDacMask; + { + if (SvgaHdrCounter == 4) + { + SvgaHdrCounter = 0; + return SvgaHiddenRegister; + } + else + { + SvgaHdrCounter++; + return VgaDacMask; + } + } case VGA_DAC_READ_INDEX: /* This returns the read/write state */ @@ -1512,21 +1610,37 @@ static BYTE WINAPI VgaReadPort(USHORT Port) static inline VOID VgaWriteSequencer(BYTE Data) { - ASSERT(VgaSeqIndex < VGA_SEQ_MAX_REG); - /* Save the value */ - VgaSeqRegisters[VgaSeqIndex] = Data; + VgaSeqRegisters[VgaSeqIndex & VGA_SEQ_INDEX_MASK] = Data; + + /* Check the index */ + switch (VgaSeqIndex & VGA_SEQ_INDEX_MASK) + { + case SVGA_SEQ_UNLOCK_REG: + { + if ((Data & SVGA_SEQ_UNLOCK_MASK) == SVGA_SEQ_UNLOCKED) + { + /* Unlock SVGA extensions */ + VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] = SVGA_SEQ_UNLOCKED; + } + else + { + /* Lock SVGA extensions */ + VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] = SVGA_SEQ_LOCKED; + } + + break; + } + } } static inline VOID VgaWriteGc(BYTE Data) { - ASSERT(VgaGcIndex < VGA_GC_MAX_REG); - /* Save the value */ - VgaGcRegisters[VgaGcIndex] = Data; + VgaGcRegisters[VgaGcIndex & VGA_GC_INDEX_MASK] = Data; /* Check the index */ - switch (VgaGcIndex) + switch (VgaGcIndex & VGA_GC_INDEX_MASK) { case VGA_GC_MISC_REG: { @@ -1553,13 +1667,11 @@ static inline VOID VgaWriteGc(BYTE Data) static inline VOID VgaWriteCrtc(BYTE Data) { - ASSERT(VgaGcIndex < VGA_CRTC_MAX_REG); - /* Save the value */ - VgaCrtcRegisters[VgaCrtcIndex] = Data; + VgaCrtcRegisters[VgaCrtcIndex & VGA_CRTC_INDEX_MASK] = Data; /* Check the index */ - switch (VgaCrtcIndex) + switch (VgaCrtcIndex & VGA_CRTC_INDEX_MASK) { case VGA_CRTC_END_HORZ_DISP_REG: case VGA_CRTC_VERT_DISP_END_REG: @@ -1749,7 +1861,12 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data) case VGA_SEQ_INDEX: { /* Set the sequencer index register */ - if (Data < VGA_SEQ_MAX_REG) VgaSeqIndex = Data; + if ((Data & 0x1F) < SVGA_SEQ_MAX_UNLOCKED_REG + && (Data & 0x1F) != VGA_SEQ_MAX_REG) + { + VgaSeqIndex = Data; + } + break; } @@ -1762,7 +1879,9 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data) case VGA_DAC_MASK: { - VgaDacMask = Data; + if (SvgaHdrCounter == 4) SvgaHiddenRegister = Data; + else VgaDacMask = Data; + break; } @@ -1791,7 +1910,14 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data) case VGA_CRTC_INDEX_COLOR: { /* Set the CRTC index register */ - if (Data < VGA_CRTC_MAX_REG) VgaCrtcIndex = Data; + if (((Data & VGA_CRTC_INDEX_MASK) < SVGA_CRTC_MAX_UNLOCKED_REG) + && ((Data & VGA_CRTC_INDEX_MASK) < SVGA_CRTC_UNUSED0_REG + || (Data & VGA_CRTC_INDEX_MASK) > SVGA_CRTC_UNUSED6_REG) + && (Data & VGA_CRTC_INDEX_MASK) != SVGA_CRTC_UNUSED7_REG) + { + VgaCrtcIndex = Data; + } + break; } @@ -1806,7 +1932,14 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data) case VGA_GC_INDEX: { /* Set the GC index register */ - if (Data < VGA_GC_MAX_REG) VgaGcIndex = Data; + if ((Data & VGA_GC_INDEX_MASK) < SVGA_GC_MAX_UNLOCKED_REG + && (Data & VGA_GC_INDEX_MASK) != SVGA_GC_UNUSED0_REG + && ((Data & VGA_GC_INDEX_MASK) < SVGA_GC_UNUSED1_REG + || (Data & VGA_GC_INDEX_MASK) > SVGA_GC_UNUSED10_REG)) + { + VgaGcIndex = Data; + } + break; } @@ -1821,6 +1954,8 @@ static VOID WINAPI VgaWritePort(USHORT Port, BYTE Data) DPRINT1("VgaWritePort: Unknown port 0x%X, Data 0x%02X\n", Port, Data); break; } + + SvgaHdrCounter = 0; } static VOID FASTCALL VgaVerticalRetrace(ULONGLONG ElapsedTime) @@ -2178,6 +2313,12 @@ VOID VgaDetachFromConsole(BOOL ChangingMode) BOOLEAN VgaInitialize(HANDLE TextHandle) { + /* Clear the SEQ, GC, CRTC and AC registers */ + RtlZeroMemory(VgaSeqRegisters, sizeof(VgaSeqRegisters)); + RtlZeroMemory(VgaGcRegisters, sizeof(VgaGcRegisters)); + RtlZeroMemory(VgaCrtcRegisters, sizeof(VgaCrtcRegisters)); + RtlZeroMemory(VgaAcRegisters, sizeof(VgaAcRegisters)); + /* Save the default text-mode console output handle */ if (!IsConsoleHandle(TextHandle)) return FALSE; TextConsoleBuffer = TextHandle; @@ -2197,6 +2338,9 @@ BOOLEAN VgaInitialize(HANDLE TextHandle) /* Switch to the text buffer */ VgaSetActiveScreenBuffer(TextConsoleBuffer); + /* Reset the sequencer */ + VgaResetSequencer(); + /* Clear the VGA memory */ VgaClearMemory(); diff --git a/reactos/subsystems/mvdm/ntvdm/hardware/video/vga.h b/reactos/subsystems/mvdm/ntvdm/hardware/video/svga.h similarity index 64% rename from reactos/subsystems/mvdm/ntvdm/hardware/video/vga.h rename to reactos/subsystems/mvdm/ntvdm/hardware/video/svga.h index cdaa486be6b..4d98bb72e24 100644 --- a/reactos/subsystems/mvdm/ntvdm/hardware/video/vga.h +++ b/reactos/subsystems/mvdm/ntvdm/hardware/video/svga.h @@ -1,13 +1,13 @@ /* * COPYRIGHT: GPL - See COPYING in the top level directory * PROJECT: ReactOS Virtual DOS Machine - * FILE: vga.h - * PURPOSE: VGA hardware emulation + * FILE: svga.h + * PURPOSE: SuperVGA hardware emulation (Cirrus Logic CL-GD5434 compatible) * PROGRAMMERS: Aleksandar Andrejevic */ -#ifndef _VGA_H_ -#define _VGA_H_ +#ifndef _SVGA_H_ +#define _SVGA_H_ /* DEFINES ********************************************************************/ @@ -25,7 +25,14 @@ #define VGA_FONT_CHARACTERS 256 #define VGA_MAX_FONT_HEIGHT 32 #define VGA_FONT_SIZE (VGA_FONT_CHARACTERS * VGA_MAX_FONT_HEIGHT) +#define VGA_CLOCK_BASE 14318181 +#define SVGA_IS_UNLOCKED (VgaSeqRegisters[SVGA_SEQ_UNLOCK_REG] == SVGA_SEQ_UNLOCKED) +#define SVGA_BANK_SIZE 0x100000 + +#define SVGA_SEQ_MAX_UNLOCKED_REG (SVGA_IS_UNLOCKED ? SVGA_SEQ_MAX_REG : VGA_SEQ_MAX_REG) +#define SVGA_CRTC_MAX_UNLOCKED_REG (SVGA_IS_UNLOCKED ? SVGA_CRTC_MAX_REG : VGA_CRTC_MAX_REG) +#define SVGA_GC_MAX_UNLOCKED_REG (SVGA_IS_UNLOCKED ? SVGA_GC_MAX_REG : VGA_GC_MAX_REG) /* Register I/O ports */ @@ -61,6 +68,10 @@ #define VGA_GC_INDEX 0x3CE #define VGA_GC_DATA 0x3CF +#define VGA_SEQ_INDEX_MASK 0x1F +#define VGA_GC_INDEX_MASK 0x3F +#define VGA_CRTC_INDEX_MASK 0x3F + // @@ -101,6 +112,20 @@ #define VGA_SEQ_MEM_OE_DIS (1 << 2) #define VGA_SEQ_MEM_C4 (1 << 3) +#define SVGA_SEQ_LOCKED 0x0F +#define SVGA_SEQ_UNLOCK_MASK 0x17 +#define SVGA_SEQ_UNLOCKED 0x12 + +/* Sequencer extended mode register bits */ +#define SVGA_SEQ_EXT_MODE_HIGH_RES (1 << 0) + +/* Sequencer extended control register bits */ +#define SVGA_SEQ_EXT_CONTROL_MMIO (1 << 2) +#define SVGA_SEQ_EXT_CONTROL_MMIO_HIGH (1 << 6) + +/* MCLK register bits */ +#define SVGA_SEQ_MCLK_VCLK (1 << 6) + enum { VGA_SEQ_RESET_REG, @@ -108,10 +133,36 @@ enum VGA_SEQ_MASK_REG, VGA_SEQ_CHAR_REG, VGA_SEQ_MEM_REG, - VGA_SEQ_MAX_REG + VGA_SEQ_MAX_REG, + SVGA_SEQ_UNLOCK_REG, + SVGA_SEQ_EXT_MODE_REG, + SVGA_SEQ_EEPROM_REG, + SVGA_SEQ_SCRATCH_0_REG, + SVGA_SEQ_SCRATCH_1_REG, + SVGA_SEQ_VCLK0_NUMERATOR_REG, + SVGA_SEQ_VCLK1_NUMERATOR_REG, + SVGA_SEQ_VCLK2_NUMERATOR_REG, + SVGA_SEQ_VCLK3_NUMERATOR_REG, + SVGA_SEQ_DRAM_REG, + SVGA_SEQ_CURSOR_X_REG, + SVGA_SEQ_CURSOR_Y_REG, + SVGA_SEQ_CURSOR_ATTR_REG, + SVGA_SEQ_CURSOR_PATTERN_REG, + SVGA_SEQ_SCRATCH_2_REG, + SVGA_SEQ_SCRATCH_3_REG, + SVGA_SEQ_PERFORMANCE_REG, + SVGA_SEQ_EXT_CONTROL_REG, + SVGA_SEQ_SIG_GEN_CONTROL_REG, + SVGA_SEQ_SIG_GEN_RESULT_LOW_REG, + SVGA_SEQ_SIG_GEN_RESULT_HIGH_REG, + SVGA_SEQ_VCLK0_DENOMINATOR_REG, + SVGA_SEQ_VCLK1_DENOMINATOR_REG, + SVGA_SEQ_VCLK2_DENOMINATOR_REG, + SVGA_SEQ_VCLK3_DENOMINATOR_REG, + SVGA_SEQ_MCLK_REG, + SVGA_SEQ_MAX_REG }; - // // CRT Controller Registers // @@ -164,7 +215,23 @@ enum VGA_CRTC_END_VERT_BLANKING_REG, VGA_CRTC_MODE_CONTROL_REG, VGA_CRTC_LINE_COMPARE_REG, - VGA_CRTC_MAX_REG + VGA_CRTC_MAX_REG, + SVGA_CRTC_INTERLACE_END_REG = VGA_CRTC_MAX_REG, + SVGA_CRTC_MISC_CONTROL_REG, + SVGA_CRTC_EXT_DISPLAY_REG, + SVGA_CRTC_SYNC_ADJUST_REG, + SVGA_CRTC_OVERLAY_REG, + SVGA_CRTC_UNUSED0_REG, + SVGA_CRTC_UNUSED1_REG, + SVGA_CRTC_UNUSED2_REG, + SVGA_CRTC_UNUSED3_REG, + SVGA_CRTC_UNUSED4_REG, + SVGA_CRTC_UNUSED5_REG, + SVGA_CRTC_UNUSED6_REG, + SVGA_CRTC_PART_STATUS_REG, + SVGA_CRTC_UNUSED7_REG, + SVGA_CRTC_ID_REG, + SVGA_CRTC_MAX_REG }; @@ -193,7 +260,51 @@ enum VGA_GC_MISC_REG, VGA_GC_COLOR_IGNORE_REG, VGA_GC_BITMASK_REG, - VGA_GC_MAX_REG + VGA_GC_MAX_REG, + SVGA_GC_OFFSET_0_REG = VGA_GC_MAX_REG, + SVGA_GC_OFFSET_1_REG, + SVGA_GC_EXT_MODE_REG, + SVGA_GC_COLOR_COMPARE_REG, + SVGA_GC_BITMASK_REG, + SVGA_GC_POWER_MANAGEMENT_REG, + SVGA_GC_UNUSED0_REG, + SVGA_GC_BACKGROUND_1_REG, + SVGA_GC_FOREGROUND_1_REG, + SVGA_GC_BACKGROUND_2_REG, + SVGA_GC_FOREGROUND_2_REG, + SVGA_GC_BACKGROUND_3_REG, + SVGA_GC_FOREGROUND_3_REG, + SVGA_GC_UNUSED1_REG, + SVGA_GC_UNUSED2_REG, + SVGA_GC_UNUSED3_REG, + SVGA_GC_UNUSED4_REG, + SVGA_GC_UNUSED5_REG, + SVGA_GC_UNUSED6_REG, + SVGA_GC_UNUSED7_REG, + SVGA_GC_UNUSED8_REG, + SVGA_GC_UNUSED9_REG, + SVGA_GC_UNUSED10_REG, + SVGA_GC_BLT_WIDTH_LOW_REG, + SVGA_GC_BLT_WIDTH_HIGH_REG, + SVGA_GC_BLT_HEIGHT_LOW_REG, + SVGA_GC_BLT_HEIGHT_HIGH_REG, + SVGA_GC_BLT_DEST_PITCH_LOW_REG, + SVGA_GC_BLT_DEST_PITCH_HIGH_REG, + SVGA_GC_BLT_SRC_PITCH_LOW_REG, + SVGA_GC_BLT_SRC_PITCH_HIGH_REG, + SVGA_GC_BLT_DEST_START_0_REG, + SVGA_GC_BLT_DEST_START_1_REG, + SVGA_GC_BLT_DEST_START_2_REG, + SVGA_GC_UNUSED11_REG, + SVGA_GC_BLT_SRC_START_0_REG, + SVGA_GC_BLT_SRC_START_1_REG, + SVGA_GC_BLT_SRC_START_2_REG, + SVGA_GC_BLT_DEST_MASK_REG, + SVGA_GC_BLT_MODE_REG, + SVGA_GC_BLT_STATUS_REG, + SVGA_GC_BLT_ROP_REG, + SVGA_GC_BLT_EXT_MODE_REG, + SVGA_GC_MAX_REG }; @@ -265,6 +376,6 @@ BOOLEAN VgaGetDoubleVisionState(PBOOLEAN Horizontal, PBOOLEAN Vertical); BOOLEAN VgaInitialize(HANDLE TextHandle); VOID VgaCleanup(VOID); -#endif // _VGA_H_ +#endif // _SVGA_H_ /* EOF */