diff --git a/reactos/hal/halx86/include/apic.h b/reactos/hal/halx86/include/apic.h
index 92497b82251..a05c0d78e90 100644
--- a/reactos/hal/halx86/include/apic.h
+++ b/reactos/hal/halx86/include/apic.h
@@ -5,7 +5,11 @@
 #ifndef __INTERNAL_HAL_APIC_H
 #define __INTERNAL_HAL_APIC_H
 
+#ifdef _M_AMD64
+#define APIC_DEFAULT_BASE     0xfffffffffee00000ULL;
+#else
 #define APIC_DEFAULT_BASE     0xFEE00000    /* Default Local APIC Base Register Address */
+#endif
 
 /* APIC Register Address Map */
 #define APIC_ID      0x0020 /* Local APIC ID Register (R/W) */
diff --git a/reactos/hal/halx86/mp/apic.c b/reactos/hal/halx86/mp/apic.c
index a4d6e81c601..d07c86410b0 100644
--- a/reactos/hal/halx86/mp/apic.c
+++ b/reactos/hal/halx86/mp/apic.c
@@ -916,7 +916,21 @@ VOID
 SetInterruptGate(ULONG index, ULONG_PTR address)
 {
 #ifdef _M_AMD64
-UNIMPLEMENTED;
+  KIDTENTRY64 *idt;
+
+  idt = &KeGetPcr()->IdtBase[index];
+
+  idt->OffsetLow = address & 0xffff;
+  idt->Selector = KGDT_64_R0_CODE;
+  idt->IstIndex = 0;
+  idt->Reserved0 = 0;
+  idt->Type = 0x0e;
+  idt->Dpl = 0;
+  idt->Present = 1;
+  idt->OffsetMiddle = (address >> 16) & 0xffff;
+  idt->OffsetHigh = address >> 32;
+  idt->Reserved1 = 0;
+  idt->Alignment = 0;
 #else
   KIDTENTRY *idt;
   KIDT_ACCESS Access;
@@ -960,7 +974,7 @@ VOID HaliInitBSP(VOID)
 #ifdef CONFIG_SMP
    SetInterruptGate(IPI_VECTOR, (ULONG_PTR)MpsIpiInterrupt);
 #endif
-   DPRINT("APIC is mapped at 0x%X\n", APICBase);
+   DPRINT1("APIC is mapped at 0x%p\n", (PVOID)APICBase);
 
    if (VerifyLocalAPIC()) 
    {
@@ -968,7 +982,7 @@ VOID HaliInitBSP(VOID)
    } 
    else 
    {
-      DPRINT("No APIC found\n");
+      DPRINT1("No APIC found\n");
       ASSERT(FALSE);
    }