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core/arm: model ARM11 MPCore timing per TRM
This Commit also reverts my initial "reimplementation / revertion" of the legacy "1 tick : 1 instruction" cpu cycling. - Fix a bug related to the Get<field> helper. It performed a parallel bit deposit where an extract was required - Branch prediction stuff - Charge now loads/stores their 1-cycle issue cost instead of flat interlock penalty Add VFP11 costs (was VFP -> decay to 1 cycle generic entry) - Implement Thumb dispatch
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@@ -9,7 +9,6 @@ foreach(KEY IN ITEMS
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"use_artic_base_controller"
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"enable_gamemode"
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"use_cpu_jit"
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"cpu_legacy_instruction_ticks"
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"cpu_clock_percentage"
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"is_new_3ds"
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"lle_applets"
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