core/arm: model ARM11 MPCore timing per TRM

This Commit also reverts my initial "reimplementation / revertion" of the legacy "1 tick : 1 instruction" cpu cycling.

- Fix a bug related to the Get<field> helper. It performed a parallel bit deposit where an extract was required

- Branch prediction stuff

- Charge now loads/stores their 1-cycle issue cost instead of flat interlock penalty

Add VFP11 costs (was VFP -> decay to 1 cycle generic entry)

- Implement Thumb dispatch
This commit is contained in:
ApfelTeeSaft
2026-07-07 16:33:36 +02:00
parent 3eb504d67c
commit 934c846d12
9 changed files with 209 additions and 153 deletions
-1
View File
@@ -9,7 +9,6 @@ foreach(KEY IN ITEMS
"use_artic_base_controller"
"enable_gamemode"
"use_cpu_jit"
"cpu_legacy_instruction_ticks"
"cpu_clock_percentage"
"is_new_3ds"
"lle_applets"